Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt...

[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 17be01e351b3fa9d8713988152495feda239d461..57204e298975b4b9516f5be83734e442806bb76c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -274,7 +274,7 @@ typedef struct drm_i915_private {
        struct drm_i915_display_funcs display;
 
        /* Register state */
-       bool suspended;
+       bool modeset_on_lid;
        u8 saveLBB;
        u32 saveDSPACNTR;
        u32 saveDSPBCNTR;
@@ -296,6 +296,12 @@ typedef struct drm_i915_private {
        u32 saveVBLANK_A;
        u32 saveVSYNC_A;
        u32 saveBCLRPAT_A;
+       u32 saveTRANS_HTOTAL_A;
+       u32 saveTRANS_HBLANK_A;
+       u32 saveTRANS_HSYNC_A;
+       u32 saveTRANS_VTOTAL_A;
+       u32 saveTRANS_VBLANK_A;
+       u32 saveTRANS_VSYNC_A;
        u32 savePIPEASTAT;
        u32 saveDSPASTRIDE;
        u32 saveDSPASIZE;
@@ -304,8 +310,11 @@ typedef struct drm_i915_private {
        u32 saveDSPASURF;
        u32 saveDSPATILEOFF;
        u32 savePFIT_PGM_RATIOS;
+       u32 saveBLC_HIST_CTL;
        u32 saveBLC_PWM_CTL;
        u32 saveBLC_PWM_CTL2;
+       u32 saveBLC_CPU_PWM_CTL;
+       u32 saveBLC_CPU_PWM_CTL2;
        u32 saveFPB0;
        u32 saveFPB1;
        u32 saveDPLL_B;
@@ -317,6 +326,12 @@ typedef struct drm_i915_private {
        u32 saveVBLANK_B;
        u32 saveVSYNC_B;
        u32 saveBCLRPAT_B;
+       u32 saveTRANS_HTOTAL_B;
+       u32 saveTRANS_HBLANK_B;
+       u32 saveTRANS_HSYNC_B;
+       u32 saveTRANS_VTOTAL_B;
+       u32 saveTRANS_VBLANK_B;
+       u32 saveTRANS_VSYNC_B;
        u32 savePIPEBSTAT;
        u32 saveDSPBSTRIDE;
        u32 saveDSPBSIZE;
@@ -342,6 +357,7 @@ typedef struct drm_i915_private {
        u32 savePFIT_CONTROL;
        u32 save_palette_a[256];
        u32 save_palette_b[256];
+       u32 saveDPFC_CB_BASE;
        u32 saveFBC_CFB_BASE;
        u32 saveFBC_LL_BASE;
        u32 saveFBC_CONTROL;
@@ -349,6 +365,12 @@ typedef struct drm_i915_private {
        u32 saveIER;
        u32 saveIIR;
        u32 saveIMR;
+       u32 saveDEIER;
+       u32 saveDEIMR;
+       u32 saveGTIER;
+       u32 saveGTIMR;
+       u32 saveFDI_RXA_IMR;
+       u32 saveFDI_RXB_IMR;
        u32 saveCACHE_MODE_0;
        u32 saveD_STATE;
        u32 saveDSPCLK_GATE_D;
@@ -382,6 +404,16 @@ typedef struct drm_i915_private {
        u32 savePIPEB_DP_LINK_M;
        u32 savePIPEA_DP_LINK_N;
        u32 savePIPEB_DP_LINK_N;
+       u32 saveFDI_RXA_CTL;
+       u32 saveFDI_TXA_CTL;
+       u32 saveFDI_RXB_CTL;
+       u32 saveFDI_TXB_CTL;
+       u32 savePFA_CTL_1;
+       u32 savePFB_CTL_1;
+       u32 savePFA_WIN_SZ;
+       u32 savePFB_WIN_SZ;
+       u32 savePFA_WIN_POS;
+       u32 savePFB_WIN_POS;
 
        struct {
                struct drm_mm gtt_space;
@@ -983,7 +1015,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 
 #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
 #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
-#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_GM45(dev)) && !IS_IGD(dev))
+#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
+                          (IS_I9XX(dev) || IS_GM45(dev)) && \
+                          !IS_IGD(dev) && \
+                          !IS_IGDNG(dev))
 
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)