Merge tag 'drm-intel-next-2017-09-07' of git://anongit.freedesktop.org/git/drm-intel...

[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bd74641ab7f6ebb85e0fe68143371a510d77cdc7..b1fa81348ee915b89bb3ab63145aca496966234e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -80,8 +80,8 @@
 
 #define DRIVER_NAME            "i915"
 #define DRIVER_DESC            "Intel Graphics"
-#define DRIVER_DATE            "20170818"
-#define DRIVER_TIMESTAMP       1503088845
+#define DRIVER_DATE            "20170907"
+#define DRIVER_TIMESTAMP       1504772900
 
 /* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
  * WARN_ON()) for hw state sanity checks to check for unexpected conditions
@@ -569,6 +569,24 @@ struct i915_hotplug {
             (__i)++) \
                for_each_if (plane_state)
 
+#define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \
+       for ((__i) = 0; \
+            (__i) < (__state)->base.dev->mode_config.num_crtc && \
+                    ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+                     (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+            (__i)++) \
+               for_each_if (crtc)
+
+
+#define for_each_oldnew_intel_plane_in_state(__state, plane, old_plane_state, new_plane_state, __i) \
+       for ((__i) = 0; \
+            (__i) < (__state)->base.dev->mode_config.num_total_plane && \
+                    ((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \
+                     (old_plane_state) = to_intel_plane_state((__state)->base.planes[__i].old_state), \
+                     (new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
+            (__i)++) \
+               for_each_if (plane)
+
 struct drm_i915_private;
 struct i915_mm_struct;
 struct i915_mmu_object;
@@ -707,8 +725,7 @@ struct drm_i915_display_funcs {
                            struct drm_atomic_state *old_state);
        void (*crtc_disable)(struct intel_crtc_state *old_crtc_state,
                             struct drm_atomic_state *old_state);
-       void (*update_crtcs)(struct drm_atomic_state *state,
-                            unsigned int *crtc_vblank_mask);
+       void (*update_crtcs)(struct drm_atomic_state *state);
        void (*audio_codec_enable)(struct drm_connector *connector,
                                   struct intel_encoder *encoder,
                                   const struct drm_display_mode *adjusted_mode);
@@ -842,6 +859,7 @@ struct intel_device_info {
        u8 gen;
        u16 gen_mask;
        enum intel_platform platform;
+       u8 gt; /* GT number, 0 if undefined */
        u8 ring_mask; /* Rings supported by the HW */
        u8 num_rings;
 #define DEFINE_FLAG(name) u8 name:1
@@ -1107,6 +1125,7 @@ struct intel_fbc {
                } fb;
 
                int cfb_size;
+               unsigned int gen9_wa_cfb_stride;
        } params;
 
        struct intel_fbc_work {
@@ -1465,6 +1484,11 @@ struct i915_gem_mm {
        struct llist_head free_list;
        struct work_struct free_work;
 
+       /**
+        * Small stash of WC pages
+        */
+       struct pagevec wc_stash;
+
        /** Usable portion of the GTT for GEM */
        dma_addr_t stolen_base; /* limited to low memory (32-bit) */
 
@@ -1718,7 +1742,7 @@ struct intel_vbt_data {
        int crt_ddc_pin;
 
        int child_dev_num;
-       union child_device_config *child_dev;
+       struct child_device_config *child_dev;
 
        struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
        struct sdvo_device_mapping sdvo_mappings[2];
@@ -2329,7 +2353,8 @@ struct drm_i915_private {
        struct mutex dpll_lock;
 
        unsigned int active_crtcs;
-       unsigned int min_pixclk[I915_MAX_PIPES];
+       /* minimum acceptable cdclk for each pipe */
+       int min_cdclk[I915_MAX_PIPES];
 
        int dpio_phy_iosf_port[I915_NUM_PHYS_VLV];
 
@@ -2862,9 +2887,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_G33(dev_priv)       ((dev_priv)->info.platform == INTEL_G33)
 #define IS_IRONLAKE_M(dev_priv)        (INTEL_DEVID(dev_priv) == 0x0046)
 #define IS_IVYBRIDGE(dev_priv) ((dev_priv)->info.platform == INTEL_IVYBRIDGE)
-#define IS_IVB_GT1(dev_priv)   (INTEL_DEVID(dev_priv) == 0x0156 || \
-                                INTEL_DEVID(dev_priv) == 0x0152 || \
-                                INTEL_DEVID(dev_priv) == 0x015a)
+#define IS_IVB_GT1(dev_priv)   (IS_IVYBRIDGE(dev_priv) && \
+                                (dev_priv)->info.gt == 1)
 #define IS_VALLEYVIEW(dev_priv)        ((dev_priv)->info.platform == INTEL_VALLEYVIEW)
 #define IS_CHERRYVIEW(dev_priv)        ((dev_priv)->info.platform == INTEL_CHERRYVIEW)
 #define IS_HASWELL(dev_priv)   ((dev_priv)->info.platform == INTEL_HASWELL)
@@ -2886,11 +2910,11 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_BDW_ULX(dev_priv)   (IS_BROADWELL(dev_priv) && \
                                 (INTEL_DEVID(dev_priv) & 0xf) == 0xe)
 #define IS_BDW_GT3(dev_priv)   (IS_BROADWELL(dev_priv) && \
-                                (INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+                                (dev_priv)->info.gt == 3)
 #define IS_HSW_ULT(dev_priv)   (IS_HASWELL(dev_priv) && \
                                 (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0A00)
 #define IS_HSW_GT3(dev_priv)   (IS_HASWELL(dev_priv) && \
-                                (INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+                                (dev_priv)->info.gt == 3)
 /* ULX machines are also considered ULT. */
 #define IS_HSW_ULX(dev_priv)   (INTEL_DEVID(dev_priv) == 0x0A0E || \
                                 INTEL_DEVID(dev_priv) == 0x0A1E)
@@ -2911,15 +2935,15 @@ intel_info(const struct drm_i915_private *dev_priv)
                                 INTEL_DEVID(dev_priv) == 0x5915 || \
                                 INTEL_DEVID(dev_priv) == 0x591E)
 #define IS_SKL_GT2(dev_priv)   (IS_SKYLAKE(dev_priv) && \
-                                (INTEL_DEVID(dev_priv) & 0x00F0) == 0x0010)
+                                (dev_priv)->info.gt == 2)
 #define IS_SKL_GT3(dev_priv)   (IS_SKYLAKE(dev_priv) && \
-                                (INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+                                (dev_priv)->info.gt == 3)
 #define IS_SKL_GT4(dev_priv)   (IS_SKYLAKE(dev_priv) && \
-                                (INTEL_DEVID(dev_priv) & 0x00F0) == 0x0030)
+                                (dev_priv)->info.gt == 4)
 #define IS_KBL_GT2(dev_priv)   (IS_KABYLAKE(dev_priv) && \
-                                (INTEL_DEVID(dev_priv) & 0x00F0) == 0x0010)
+                                (dev_priv)->info.gt == 2)
 #define IS_KBL_GT3(dev_priv)   (IS_KABYLAKE(dev_priv) && \
-                                (INTEL_DEVID(dev_priv) & 0x00F0) == 0x0020)
+                                (dev_priv)->info.gt == 3)
 #define IS_CFL_ULT(dev_priv)   (IS_COFFEELAKE(dev_priv) && \
                                 (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
 
@@ -3479,6 +3503,9 @@ void __i915_gem_object_invalidate(struct drm_i915_gem_object *obj);
 enum i915_map_type {
        I915_MAP_WB = 0,
        I915_MAP_WC,
+#define I915_MAP_OVERRIDE BIT(31)
+       I915_MAP_FORCE_WB = I915_MAP_WB | I915_MAP_OVERRIDE,
+       I915_MAP_FORCE_WC = I915_MAP_WC | I915_MAP_OVERRIDE,
 };
 
 /**
@@ -3645,6 +3672,9 @@ i915_vm_to_ppgtt(struct i915_address_space *vm)
 /* i915_gem_fence_reg.c */
 int __must_check i915_vma_get_fence(struct i915_vma *vma);
 int __must_check i915_vma_put_fence(struct i915_vma *vma);
+struct drm_i915_fence_reg *
+i915_reserve_fence(struct drm_i915_private *dev_priv);
+void i915_unreserve_fence(struct drm_i915_fence_reg *fence);
 
 void i915_gem_revoke_fences(struct drm_i915_private *dev_priv);
 void i915_gem_restore_fences(struct drm_i915_private *dev_priv);
@@ -4330,11 +4360,4 @@ int remap_io_mapping(struct vm_area_struct *vma,
                     unsigned long addr, unsigned long pfn, unsigned long size,
                     struct io_mapping *iomap);
 
-static inline bool
-intel_engine_can_store_dword(struct intel_engine_cs *engine)
-{
-       return __intel_engine_can_store_dword(INTEL_GEN(engine->i915),
-                                             engine->class);
-}
-
 #endif