BackMerge tag 'v4.12-rc5' into drm-next

[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / i915 / i915_gem_gtt.c

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f1989b8792dd6f21ba1a944113b424fb8dc3184d..1489c3af714599cbf0bece316ef784fbfd4d834e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -168,13 +168,11 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
        if (enable_ppgtt == 3 && has_full_48bit_ppgtt)
                return 3;
 
-#ifdef CONFIG_INTEL_IOMMU
        /* Disable ppgtt on SNB if VT-d is on. */
-       if (IS_GEN6(dev_priv) && intel_iommu_gfx_mapped) {
+       if (IS_GEN6(dev_priv) && intel_vtd_active()) {
                DRM_INFO("Disabling PPGTT because VT-d is on\n");
                return 0;
        }
-#endif
 
        /* Early VLV doesn't have this */
        if (IS_VALLEYVIEW(dev_priv) && dev_priv->drm.pdev->revision < 0xb) {
@@ -1992,14 +1990,10 @@ void i915_ppgtt_release(struct kref *kref)
  */
 static bool needs_idle_maps(struct drm_i915_private *dev_priv)
 {
-#ifdef CONFIG_INTEL_IOMMU
        /* Query intel_iommu to see if we need the workaround. Presumably that
         * was loaded first.
         */
-       if (IS_GEN5(dev_priv) && IS_MOBILE(dev_priv) && intel_iommu_gfx_mapped)
-               return true;
-#endif
-       return false;
+       return IS_GEN5(dev_priv) && IS_MOBILE(dev_priv) && intel_vtd_active();
 }
 
 void i915_check_and_clear_faults(struct drm_i915_private *dev_priv)
@@ -2678,14 +2672,14 @@ static size_t gen6_get_stolen_size(u16 snb_gmch_ctl)
 {
        snb_gmch_ctl >>= SNB_GMCH_GMS_SHIFT;
        snb_gmch_ctl &= SNB_GMCH_GMS_MASK;
-       return snb_gmch_ctl << 25; /* 32 MB units */
+       return (size_t)snb_gmch_ctl << 25; /* 32 MB units */
 }
 
 static size_t gen8_get_stolen_size(u16 bdw_gmch_ctl)
 {
        bdw_gmch_ctl >>= BDW_GMCH_GMS_SHIFT;
        bdw_gmch_ctl &= BDW_GMCH_GMS_MASK;
-       return bdw_gmch_ctl << 25; /* 32 MB units */
+       return (size_t)bdw_gmch_ctl << 25; /* 32 MB units */
 }
 
 static size_t chv_get_stolen_size(u16 gmch_ctrl)
@@ -2699,11 +2693,11 @@ static size_t chv_get_stolen_size(u16 gmch_ctrl)
         * 0x17 to 0x1d: 4MB increments start at 36MB
         */
        if (gmch_ctrl < 0x11)
-               return gmch_ctrl << 25;
+               return (size_t)gmch_ctrl << 25;
        else if (gmch_ctrl < 0x17)
-               return (gmch_ctrl - 0x11 + 2) << 22;
+               return (size_t)(gmch_ctrl - 0x11 + 2) << 22;
        else
-               return (gmch_ctrl - 0x17 + 9) << 22;
+               return (size_t)(gmch_ctrl - 0x17 + 9) << 22;
 }
 
 static size_t gen9_get_stolen_size(u16 gen9_gmch_ctl)
@@ -2712,10 +2706,10 @@ static size_t gen9_get_stolen_size(u16 gen9_gmch_ctl)
        gen9_gmch_ctl &= BDW_GMCH_GMS_MASK;
 
        if (gen9_gmch_ctl < 0xf0)
-               return gen9_gmch_ctl << 25; /* 32 MB units */
+               return (size_t)gen9_gmch_ctl << 25; /* 32 MB units */
        else
                /* 4MB increments starting at 0xf0 for 4MB */
-               return (gen9_gmch_ctl - 0xf0 + 1) << 22;
+               return (size_t)(gen9_gmch_ctl - 0xf0 + 1) << 22;
 }
 
 static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
@@ -2842,13 +2836,17 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
        struct pci_dev *pdev = dev_priv->drm.pdev;
        unsigned int size;
        u16 snb_gmch_ctl;
+       int err;
 
        /* TODO: We're not aware of mappable constraints on gen8 yet */
        ggtt->mappable_base = pci_resource_start(pdev, 2);
        ggtt->mappable_end = pci_resource_len(pdev, 2);
 
-       if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(39)))
-               pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(39));
+       err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
+       if (!err)
+               err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(39));
+       if (err)
+               DRM_ERROR("Can't set DMA mask/consistent mask (%d)\n", err);
 
        pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
 
@@ -2899,6 +2897,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
        struct pci_dev *pdev = dev_priv->drm.pdev;
        unsigned int size;
        u16 snb_gmch_ctl;
+       int err;
 
        ggtt->mappable_base = pci_resource_start(pdev, 2);
        ggtt->mappable_end = pci_resource_len(pdev, 2);
@@ -2911,8 +2910,11 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
                return -ENXIO;
        }
 
-       if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(40)))
-               pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
+       err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
+       if (!err)
+               err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
+       if (err)
+               DRM_ERROR("Can't set DMA mask/consistent mask (%d)\n", err);
        pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
 
        ggtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
@@ -3031,10 +3033,8 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
                 ggtt->base.total >> 20);
        DRM_DEBUG_DRIVER("GMADR size = %lldM\n", ggtt->mappable_end >> 20);
        DRM_DEBUG_DRIVER("GTT stolen size = %uM\n", ggtt->stolen_size >> 20);
-#ifdef CONFIG_INTEL_IOMMU
-       if (intel_iommu_gfx_mapped)
+       if (intel_vtd_active())
                DRM_INFO("VT-d active for gfx access\n");
-#endif
 
        return 0;
 }
@@ -3210,7 +3210,7 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
        int ret = -ENOMEM;
 
        /* Allocate a temporary list of source pages for random access. */
-       page_addr_list = drm_malloc_gfp(n_pages,
+       page_addr_list = kvmalloc_array(n_pages,
                                        sizeof(dma_addr_t),
                                        GFP_TEMPORARY);
        if (!page_addr_list)
@@ -3243,14 +3243,14 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
        DRM_DEBUG_KMS("Created rotated page mapping for object size %zu (%ux%u tiles, %u pages)\n",
                      obj->base.size, rot_info->plane[0].width, rot_info->plane[0].height, size);
 
-       drm_free_large(page_addr_list);
+       kvfree(page_addr_list);
 
        return st;
 
 err_sg_alloc:
        kfree(st);
 err_st_alloc:
-       drm_free_large(page_addr_list);
+       kvfree(page_addr_list);
 
        DRM_DEBUG_KMS("Failed to create rotated mapping for object size %zu! (%ux%u tiles, %u pages)\n",
                      obj->base.size, rot_info->plane[0].width, rot_info->plane[0].height, size);