drm/i915/dp: cache common rates with sink rates

[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / intel_drv.h

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 92e353dc61bfb6f252aca80040eb738079b6159e..4a4bf9cb0d9095f5313542d8ba5b31581cfae1ad 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -956,6 +956,9 @@ struct intel_dp {
        int num_sink_rates;
        int sink_rates[DP_MAX_SUPPORTED_RATES];
        bool use_rate_select;
+       /* intersection of source and sink rates */
+       int num_common_rates;
+       int common_rates[DP_MAX_SUPPORTED_RATES];
        /* Max lane count for the sink as per DPCD registers */
        uint8_t max_sink_lane_count;
        /* Max link BW for the sink as per DPCD registers */