drm/radeon: use ALIGN instead of open coding it

[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / radeon / r600_blit_kms.c

diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 9aecafb51b660947bfd2d2d7d93e92c3b3be1788..f6c6c77db7e004278d549f0c60f9a36cbd627094 100644 (file)
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -25,7 +25,7 @@ set_render_target(struct radeon_device *rdev, int format,
        u32 cb_color_info;
        int pitch, slice;
 
-       h = (h + 7) & ~7;
+       h = ALIGN(h, 8);
        if (h < 8)
                h = 8;
 
@@ -396,15 +396,13 @@ set_default_state(struct radeon_device *rdev)
                                    NUM_ES_STACK_ENTRIES(num_es_stack_entries));
 
        /* emit an IB pointing at default state */
-       dwords = (rdev->r600_blit.state_len + 0xf) & ~0xf;
+       dwords = ALIGN(rdev->r600_blit.state_len, 0x10);
        gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset;
        radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
        radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC);
        radeon_ring_write(rdev, upper_32_bits(gpu_addr) & 0xFF);
        radeon_ring_write(rdev, dwords);
 
-       radeon_ring_write(rdev, PACKET3(PACKET3_EVENT_WRITE, 0));
-       radeon_ring_write(rdev, CACHE_FLUSH_AND_INV_EVENT);
        /* SQ config */
        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 6));
        radeon_ring_write(rdev, (SQ_CONFIG - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
@@ -449,6 +447,7 @@ int r600_blit_init(struct radeon_device *rdev)
        u32 packet2s[16];
        int num_packet2s = 0;
 
+       mutex_init(&rdev->r600_blit.mutex);
        rdev->r600_blit.state_offset = 0;
 
        if (rdev->family >= CHIP_RV770)
@@ -512,14 +511,16 @@ void r600_blit_fini(struct radeon_device *rdev)
 {
        int r;
 
+       if (rdev->r600_blit.shader_obj == NULL)
+               return;
+       /* If we can't reserve the bo, unref should be enough to destroy
+        * it when it becomes idle.
+        */
        r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
-       if (unlikely(r != 0)) {
-               dev_err(rdev->dev, "(%d) can't finish r600 blit\n", r);
-               goto out_unref;
+       if (!r) {
+               radeon_bo_unpin(rdev->r600_blit.shader_obj);
+               radeon_bo_unreserve(rdev->r600_blit.shader_obj);
        }
-       radeon_bo_unpin(rdev->r600_blit.shader_obj);
-       radeon_bo_unreserve(rdev->r600_blit.shader_obj);
-out_unref:
        radeon_bo_unref(&rdev->r600_blit.shader_obj);
 }
 
@@ -540,9 +541,6 @@ int r600_vb_ib_get(struct radeon_device *rdev)
 void r600_vb_ib_put(struct radeon_device *rdev)
 {
        radeon_fence_emit(rdev, rdev->r600_blit.vb_ib->fence);
-       mutex_lock(&rdev->ib_pool.mutex);
-       list_add_tail(&rdev->r600_blit.vb_ib->list, &rdev->ib_pool.scheduled_ibs);
-       mutex_unlock(&rdev->ib_pool.mutex);
        radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
 }
 
@@ -555,7 +553,8 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
        int dwords_per_loop = 76, num_loops;
 
        r = r600_vb_ib_get(rdev);
-       WARN_ON(r);
+       if (r)
+               return r;
 
        /* set_render_target emits 2 extra dwords on rv6xx */
        if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770)
@@ -577,11 +576,12 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
        ring_size = num_loops * dwords_per_loop;
        /* set default  + shaders */
        ring_size += 40; /* shaders + def state */
-       ring_size += 5; /* fence emit for VB IB */
+       ring_size += 10; /* fence emit for VB IB */
        ring_size += 5; /* done copy */
-       ring_size += 5; /* fence emit for done copy */
+       ring_size += 10; /* fence emit for done copy */
        r = radeon_ring_lock(rdev, ring_size);
-       WARN_ON(r);
+       if (r)
+               return r;
 
        set_default_state(rdev); /* 14 */
        set_shaders(rdev); /* 26 */
@@ -592,13 +592,6 @@ void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence)
 {
        int r;
 
-       radeon_ring_write(rdev, PACKET3(PACKET3_EVENT_WRITE, 0));
-       radeon_ring_write(rdev, CACHE_FLUSH_AND_INV_EVENT);
-       /* wait for 3D idle clean */
-       radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
-       radeon_ring_write(rdev, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2);
-       radeon_ring_write(rdev, WAIT_3D_IDLE_bit | WAIT_3D_IDLECLEAN_bit);
-
        if (rdev->r600_blit.vb_ib)
                r600_vb_ib_put(rdev);