irqchip: mips-gic: Provide VP ID accessor

[mirror_ubuntu-focal-kernel.git] / drivers / irqchip / irq-mips-gic.c

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 94a30da0cfacac7d48e7e157b7ae7cd803708b50..c089f49b63fb233c1156eaccdbff1d387a7e3dd1 100644 (file)
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -197,7 +197,7 @@ void gic_write_cpu_compare(cycle_t cnt, int cpu)
 
        local_irq_save(flags);
 
-       gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), cpu);
+       gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), mips_cm_vp_id(cpu));
 
        if (mips_cm_is64) {
                gic_write(GIC_REG(VPE_OTHER, GIC_VPE_COMPARE), cnt);
@@ -246,6 +246,14 @@ void gic_stop_count(void)
 
 #endif
 
+unsigned gic_read_local_vp_id(void)
+{
+       unsigned long ident;
+
+       ident = gic_read(GIC_REG(VPE_LOCAL, GIC_VP_IDENT));
+       return ident & GIC_VP_IDENT_VCNUM_MSK;
+}
+
 static bool gic_local_irq_is_routable(int intr)
 {
        u32 vpe_ctl;
@@ -467,7 +475,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
        gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first(&tmp)));
 
        /* Update the pcpu_masks */
-       for (i = 0; i < gic_vpes; i++)
+       for (i = 0; i < min(gic_vpes, NR_CPUS); i++)
                clear_bit(irq, pcpu_masks[i].pcpu_mask);
        set_bit(irq, pcpu_masks[cpumask_first(&tmp)].pcpu_mask);
 
@@ -553,7 +561,8 @@ static void gic_mask_local_irq_all_vpes(struct irq_data *d)
 
        spin_lock_irqsave(&gic_lock, flags);
        for (i = 0; i < gic_vpes; i++) {
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
                gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_RMASK), 1 << intr);
        }
        spin_unlock_irqrestore(&gic_lock, flags);
@@ -567,7 +576,8 @@ static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
 
        spin_lock_irqsave(&gic_lock, flags);
        for (i = 0; i < gic_vpes; i++) {
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
                gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_SMASK), 1 << intr);
        }
        spin_unlock_irqrestore(&gic_lock, flags);
@@ -607,7 +617,8 @@ static void __init gic_basic_init(void)
        for (i = 0; i < gic_vpes; i++) {
                unsigned int j;
 
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
                for (j = 0; j < GIC_NUM_LOCAL_INTRS; j++) {
                        if (!gic_local_irq_is_routable(j))
                                continue;
@@ -652,7 +663,8 @@ static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq,
        for (i = 0; i < gic_vpes; i++) {
                u32 val = GIC_MAP_TO_PIN_MSK | gic_cpu_pin;
 
-               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), i);
+               gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
+                         mips_cm_vp_id(i));
 
                switch (intr) {
                case GIC_LOCAL_INT_WD:
@@ -707,7 +719,7 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
        spin_lock_irqsave(&gic_lock, flags);
        gic_map_to_pin(intr, gic_cpu_pin);
        gic_map_to_vpe(intr, vpe);
-       for (i = 0; i < gic_vpes; i++)
+       for (i = 0; i < min(gic_vpes, NR_CPUS); i++)
                clear_bit(intr, pcpu_masks[i].pcpu_mask);
        set_bit(intr, pcpu_masks[vpe].pcpu_mask);
        spin_unlock_irqrestore(&gic_lock, flags);