net: hns3: Refine the MSIX allocation for PF

[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / hisilicon / hns3 / hns3pf / hclge_main.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 3db190764bf20ee4e4d3e471a9fb90eaed83c6c8..2c309dec01f3328376db019bee3c2c92b1c3e228 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -789,7 +789,7 @@ static int hclge_get_sset_count(struct hnae3_handle *handle, int stringset)
                        handle->flags |= HNAE3_SUPPORT_MAC_LOOPBACK;
                }
 
-               count ++;
+               count++;
                handle->flags |= HNAE3_SUPPORT_SERDES_LOOPBACK;
        } else if (stringset == ETH_SS_STATS) {
                count = ARRAY_SIZE(g_mac_stats_string) +
@@ -933,6 +933,9 @@ static int hclge_query_pf_resource(struct hclge_dev *hdev)
        hdev->pkt_buf_size = __le16_to_cpu(req->buf_size) << HCLGE_BUF_UNIT_S;
 
        if (hnae3_dev_roce_supported(hdev)) {
+               hdev->roce_base_msix_offset =
+               hnae3_get_field(__le16_to_cpu(req->msixcap_localid_ba_rocee),
+                               HCLGE_MSIX_OFT_ROCEE_M, HCLGE_MSIX_OFT_ROCEE_S);
                hdev->num_roce_msi =
                hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number),
                                HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S);
@@ -940,7 +943,8 @@ static int hclge_query_pf_resource(struct hclge_dev *hdev)
                /* PF should have NIC vectors and Roce vectors,
                 * NIC vectors are queued before Roce vectors.
                 */
-               hdev->num_msi = hdev->num_roce_msi  + HCLGE_ROCE_VECTOR_OFFSET;
+               hdev->num_msi = hdev->num_roce_msi  +
+                               hdev->roce_base_msix_offset;
        } else {
                hdev->num_msi =
                hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number),
@@ -1922,6 +1926,7 @@ static int hclge_common_wl_config(struct hclge_dev *hdev,
        if (ret)
                dev_err(&hdev->pdev->dev,
                        "common waterline config cmd failed %d\n", ret);
+
        return ret;
 }
 
@@ -2037,7 +2042,7 @@ static int hclge_init_msi(struct hclge_dev *hdev)
        hdev->num_msi_left = vectors;
        hdev->base_msi_vector = pdev->irq;
        hdev->roce_base_vector = hdev->base_msi_vector +
-                               HCLGE_ROCE_VECTOR_OFFSET;
+                               hdev->roce_base_msix_offset;
 
        hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi,
                                           sizeof(u16), GFP_KERNEL);
@@ -2522,6 +2527,15 @@ static void hclge_clear_event_cause(struct hclge_dev *hdev, u32 event_type,
        }
 }
 
+static void hclge_clear_all_event_cause(struct hclge_dev *hdev)
+{
+       hclge_clear_event_cause(hdev, HCLGE_VECTOR0_EVENT_RST,
+                               BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) |
+                               BIT(HCLGE_VECTOR0_CORERESET_INT_B) |
+                               BIT(HCLGE_VECTOR0_IMPRESET_INT_B));
+       hclge_clear_event_cause(hdev, HCLGE_VECTOR0_EVENT_MBX, 0);
+}
+
 static void hclge_enable_vector(struct hclge_misc_vector *vector, bool enable)
 {
        writel(enable ? 1 : 0, vector->addr);
@@ -2697,8 +2711,7 @@ static int hclge_reset_wait(struct hclge_dev *hdev)
        }
 
        val = hclge_read_dev(&hdev->hw, reg);
-       while (hnae3_get_bit(val, reg_bit) && cnt < HCLGE_RESET_WAIT_CNT &&
-              test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state)) {
+       while (hnae3_get_bit(val, reg_bit) && cnt < HCLGE_RESET_WAIT_CNT) {
                msleep(HCLGE_RESET_WATI_MS);
                val = hclge_read_dev(&hdev->hw, reg);
                cnt++;
@@ -3736,7 +3749,7 @@ static int hclge_set_serdes_loopback(struct hclge_dev *hdev, bool en)
                                "serdes loopback get, ret = %d\n", ret);
                        return ret;
                }
-       } while (++i < HCLGE_SERDES_RETRY_NUM  &&
+       } while (++i < HCLGE_SERDES_RETRY_NUM &&
                 !(req->result & HCLGE_CMD_SERDES_DONE_B));
 
        if (!(req->result & HCLGE_CMD_SERDES_DONE_B)) {
@@ -4839,17 +4852,17 @@ static int hclge_set_vlan_tx_offload_cfg(struct hclge_vport *vport)
        req->def_vlan_tag1 = cpu_to_le16(vcfg->default_tag1);
        req->def_vlan_tag2 = cpu_to_le16(vcfg->default_tag2);
        hnae3_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG1_B,
-                       vcfg->accept_tag1 ? 1 : 0);
+                     vcfg->accept_tag1 ? 1 : 0);
        hnae3_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG1_B,
-                       vcfg->accept_untag1 ? 1 : 0);
+                     vcfg->accept_untag1 ? 1 : 0);
        hnae3_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG2_B,
-                       vcfg->accept_tag2 ? 1 : 0);
+                     vcfg->accept_tag2 ? 1 : 0);
        hnae3_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG2_B,
-                       vcfg->accept_untag2 ? 1 : 0);
+                     vcfg->accept_untag2 ? 1 : 0);
        hnae3_set_bit(req->vport_vlan_cfg, HCLGE_PORT_INS_TAG1_EN_B,
-                    vcfg->insert_tag1_en ? 1 : 0);
+                     vcfg->insert_tag1_en ? 1 : 0);
        hnae3_set_bit(req->vport_vlan_cfg, HCLGE_PORT_INS_TAG2_EN_B,
-                    vcfg->insert_tag2_en ? 1 : 0);
+                     vcfg->insert_tag2_en ? 1 : 0);
        hnae3_set_bit(req->vport_vlan_cfg, HCLGE_CFG_NIC_ROCE_SEL_B, 0);
 
        req->vf_offset = vport->vport_id / HCLGE_VF_NUM_PER_CMD;
@@ -5753,6 +5766,8 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
        INIT_WORK(&hdev->rst_service_task, hclge_reset_service_task);
        INIT_WORK(&hdev->mbx_service_task, hclge_mailbox_service_task);
 
+       hclge_clear_all_event_cause(hdev);
+
        /* Enable MISC vector(vector0) */
        hclge_enable_vector(&hdev->misc_vector, true);
 
@@ -5868,6 +5883,8 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)
 
        /* Disable MISC vector(vector0) */
        hclge_enable_vector(&hdev->misc_vector, false);
+       synchronize_irq(hdev->misc_vector.vector_irq);
+
        hclge_destroy_cmd_queue(&hdev->hw);
        hclge_misc_irq_uninit(hdev);
        hclge_pci_uninit(hdev);
@@ -6189,7 +6206,7 @@ static int hclge_set_led_status(struct hclge_dev *hdev, u8 locate_led_status)
 
        req = (struct hclge_set_led_state_cmd *)desc.data;
        hnae3_set_field(req->locate_led_config, HCLGE_LED_LOCATE_STATE_M,
-                      HCLGE_LED_LOCATE_STATE_S, locate_led_status);
+                       HCLGE_LED_LOCATE_STATE_S, locate_led_status);
 
        ret = hclge_cmd_send(&hdev->hw, &desc, 1);
        if (ret)