net: hns3: add support for querying pfc puase packets statistic

[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / hisilicon / hns3 / hns3pf / hclge_tm.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
index 4134a829c8948944f2336bfa4aa8a912776596d6..885f25cd7be49fa7669341d629abcef706fe9ffc 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
@@ -23,6 +23,9 @@ enum hclge_shaper_level {
        HCLGE_SHAPER_LVL_PF     = 1,
 };
 
+#define HCLGE_TM_PFC_PKT_GET_CMD_NUM   3
+#define HCLGE_TM_PFC_NUM_GET_PER_CMD   3
+
 #define HCLGE_SHAPER_BS_U_DEF  5
 #define HCLGE_SHAPER_BS_S_DEF  20
 
@@ -112,6 +115,56 @@ static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
        return 0;
 }
 
+static int hclge_pfc_stats_get(struct hclge_dev *hdev,
+                              enum hclge_opcode_type opcode, u64 *stats)
+{
+       struct hclge_desc desc[HCLGE_TM_PFC_PKT_GET_CMD_NUM];
+       int ret, i, j;
+
+       if (!(opcode == HCLGE_OPC_QUERY_PFC_RX_PKT_CNT ||
+             opcode == HCLGE_OPC_QUERY_PFC_TX_PKT_CNT))
+               return -EINVAL;
+
+       for (i = 0; i < HCLGE_TM_PFC_PKT_GET_CMD_NUM; i++) {
+               hclge_cmd_setup_basic_desc(&desc[i], opcode, true);
+               if (i != (HCLGE_TM_PFC_PKT_GET_CMD_NUM - 1))
+                       desc[i].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+               else
+                       desc[i].flag &= ~cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+       }
+
+       ret = hclge_cmd_send(&hdev->hw, desc, HCLGE_TM_PFC_PKT_GET_CMD_NUM);
+       if (ret) {
+               dev_err(&hdev->pdev->dev,
+                       "Get pfc pause stats fail, ret = %d.\n", ret);
+               return ret;
+       }
+
+       for (i = 0; i < HCLGE_TM_PFC_PKT_GET_CMD_NUM; i++) {
+               struct hclge_pfc_stats_cmd *pfc_stats =
+                               (struct hclge_pfc_stats_cmd *)desc[i].data;
+
+               for (j = 0; j < HCLGE_TM_PFC_NUM_GET_PER_CMD; j++) {
+                       u32 index = i * HCLGE_TM_PFC_PKT_GET_CMD_NUM + j;
+
+                       if (index < HCLGE_MAX_TC_NUM)
+                               stats[index] =
+                                       le64_to_cpu(pfc_stats->pkt_num[j]);
+               }
+       }
+       return 0;
+}
+
+int hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats)
+{
+       return hclge_pfc_stats_get(hdev, HCLGE_OPC_QUERY_PFC_RX_PKT_CNT, stats);
+}
+
+int hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats)
+{
+       return hclge_pfc_stats_get(hdev, HCLGE_OPC_QUERY_PFC_TX_PKT_CNT, stats);
+}
+
 int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)
 {
        struct hclge_desc desc;