pinctrl: Rename gpio driver from cygnus to iproc

[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / bcm / Kconfig

diff --git a/drivers/pinctrl/bcm/Kconfig b/drivers/pinctrl/bcm/Kconfig
index cd11d4d9ad58f86c719eca0193c9fe08ffd16f21..59495473ed530795501629c895aab14d86f560bc 100644 (file)
--- a/drivers/pinctrl/bcm/Kconfig
+++ b/drivers/pinctrl/bcm/Kconfig
@@ -20,27 +20,41 @@ config PINCTRL_BCM2835
        select PINMUX
        select PINCONF
 
-config PINCTRL_CYGNUS_GPIO
-       bool "Broadcom Cygnus GPIO (with PINCONF) driver"
-       depends on OF_GPIO && ARCH_BCM_CYGNUS
+config PINCTRL_IPROC_GPIO
+       bool "Broadcom iProc GPIO (with PINCONF) driver"
+       depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
        select GPIOLIB_IRQCHIP
        select PINCONF
        select GENERIC_PINCONF
-       default ARCH_BCM_CYGNUS
+       default ARCH_BCM_IPROC
        help
-         Say yes here to enable the Broadcom Cygnus GPIO driver.
+         Say yes here to enable the Broadcom iProc GPIO driver.
+
+         The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
+         same GPIO Controller IP hence this driver could be used for all.
 
          The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
          GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
          the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
          supported by this driver.
 
-         All 3 Cygnus GPIO controllers support basic PINCONF functions such
+         The Broadcom NSP has two GPIO controllers including the ChipcommonA
+         GPIO, the ChipcommonB GPIO. Later controller is supported by this
+         driver.
+
+         The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
+         the ChipcommonG GPIO. Both controllers are supported by this driver.
+
+         The Broadcom Stingray GPIO controllers are supported by this driver.
+
+         All above SoCs GPIO controllers support basic PINCONF functions such
          as bias pull up, pull down, and drive strength configurations, when
          these pins are muxed to GPIO.
 
-         Pins from the ASIU GPIO can be individually muxed to GPIO function,
-         through interaction with the Cygnus IOMUX controller.
+         It provides the framework where pins from the individual GPIO can be
+         individually muxed to GPIO function, through interaction with the
+         SoCs IOMUX controller. This features could be used only on SoCs which
+         support individual pin muxing.
 
 config PINCTRL_CYGNUS_MUX
        bool "Broadcom Cygnus IOMUX driver"