Staging: comedi: Remove C99 comments

[mirror_ubuntu-hirsute-kernel.git] / drivers / staging / comedi / drivers / ni_660x.c

diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c
index b75ea44c3307479fac594138200c387f5f72edd1..377a78afc1ebdb62d8c549bac2c1684545247b31 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_660x.c
+++ b/drivers/staging/comedi/drivers/ni_660x.c
@@ -51,7 +51,7 @@ enum ni_660x_constants {
 };
 
 #define NUM_PFI_CHANNELS 40
-// really there are only up to 3 dma channels, but the register layout allows for 4
+/* really there are only up to 3 dma channels, but the register layout allows for 4 */
 #define MAX_DMA_CHANNEL 4
 
 /* See Register-Level Programmer Manual page 3.1 */
@@ -194,10 +194,10 @@ static inline unsigned NI_660X_GPCT_SUBDEV(unsigned index)
 
 struct NI_660xRegisterData {
 
-       const char *name;       // Register Name
-       int offset;             // Offset from base address from GPCT chip
+       const char *name;       /*  Register Name */
+       int offset;             /*  Offset from base address from GPCT chip */
        enum ni_660x_register_direction direction;
-       enum ni_660x_register_width size;       // 1 byte, 2 bytes, or 4 bytes
+       enum ni_660x_register_width size;       /*  1 byte, 2 bytes, or 4 bytes */
 };
 
 
@@ -302,12 +302,12 @@ static const struct NI_660xRegisterData registerData[NumRegisters] = {
        {"IO Config Register 38-39", 0x7A2, NI_660x_READ_WRITE, DATA_2B}
 };
 
-// kind of ENABLE for the second counter
+/* kind of ENABLE for the second counter */
 enum clock_config_register_bits {
        CounterSwap = 0x1 << 21
 };
 
-// ioconfigreg
+/* ioconfigreg */
 static inline unsigned ioconfig_bitshift(unsigned pfi_channel)
 {
        if (pfi_channel % 2)
@@ -334,7 +334,7 @@ static inline unsigned pfi_input_select_bits(unsigned pfi_channel,
        return (input_select & 0x7) << (4 + ioconfig_bitshift(pfi_channel));
 }
 
-// dma configuration register bits
+/* dma configuration register bits */
 static inline unsigned dma_select_mask(unsigned dma_channel)
 {
        BUG_ON(dma_channel >= MAX_DMA_CHANNEL);
@@ -374,7 +374,7 @@ enum global_interrupt_config_register_bits {
        Global_Int_Enable_Bit = 0x80000000
 };
 
-// Offset of the GPCT chips from the base-adress of the card
+/* Offset of the GPCT chips from the base-adress of the card */
 static const unsigned GPCT_OFFSET[2] = { 0x0, 0x800 }; /* First chip is at base-address +
                                                           0x00, etc. */
 
@@ -850,7 +850,7 @@ static int ni_660x_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
        int retval;
 
        struct ni_gpct *counter = subdev_to_counter(s);
-//      const struct comedi_cmd *cmd = &s->async->cmd;
+/* const struct comedi_cmd *cmd = &s->async->cmd; */
 
        retval = ni_660x_request_mite_channel(dev, counter, COMEDI_INPUT);
        if (retval) {
@@ -1031,7 +1031,7 @@ static int ni_660x_attach(struct comedi_device * dev, struct comedi_devconfig *
        s->insn_bits = ni_660x_dio_insn_bits;
        s->insn_config = ni_660x_dio_insn_config;
        s->io_bits = 0;         /* all bits default to input */
-       // we use the ioconfig registers to control dio direction, so zero output enables in stc dio control reg
+       /*  we use the ioconfig registers to control dio direction, so zero output enables in stc dio control reg */
        ni_660x_write_register(dev, 0, 0, STCDIOControl);
 
        private(dev)->counter_dev = ni_gpct_device_construct(dev,
@@ -1132,7 +1132,7 @@ static void init_tio_chip(struct comedi_device * dev, int chipset)
 {
        unsigned i;
 
-       // init dma configuration register
+       /*  init dma configuration register */
        private(dev)->dma_configuration_soft_copies[chipset] = 0;
        for (i = 0; i < MAX_DMA_CHANNEL; ++i) {
                private(dev)->dma_configuration_soft_copies[chipset] |=
@@ -1193,7 +1193,7 @@ static int ni_660x_dio_insn_bits(struct comedi_device * dev,
 {
        unsigned base_bitfield_channel = CR_CHAN(insn->chanspec);
 
-       // Check if we have to write some bits
+       /*  Check if we have to write some bits */
        if (data[0]) {
                s->state &= ~(data[0] << base_bitfield_channel);
                s->state |= (data[0] & data[1]) << base_bitfield_channel;