* (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
* support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
* (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
- * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
+ * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
*
* Intel documents this fairly well, and as far as I know there
* are no royalties or anything like that, but even so there are
* people who decided that they want to do the same thing in a
* completely different way.
*
- * WARNING! The USB documentation is downright evil. Most of it
- * is just crap, written by a committee. You're better off ignoring
- * most of it, the important stuff is:
- * - the low-level protocol (fairly simple but lots of small details)
- * - working around the horridness of the rest
*/
#include <linux/config.h>
static kmem_cache_t *uhci_up_cachep; /* urb_priv */
+static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
+static void wakeup_rh(struct uhci_hcd *uhci);
static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
/* If a transfer is still active after this much time, turn off FSBR */
#include "uhci-debug.c"
#include "uhci-q.c"
+/*
+ * Make sure the controller is completely inactive, unable to
+ * generate interrupts or do DMA.
+ */
static void reset_hc(struct uhci_hcd *uhci)
{
- unsigned long io_addr = uhci->io_addr;
+ int port;
- /* Turn off PIRQ, SMI, and all interrupts. This also turns off
- * the BIOS's USB Legacy Support.
+ /* Turn off PIRQ enable and SMI enable. (This also turns off the
+ * BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
+ */
+ pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
+ USBLEGSUP_RWC);
+
+ /* Reset the HC - this will force us to get a
+ * new notification of any already connected
+ * ports due to the virtual disconnect that it
+ * implies.
+ */
+ outw(USBCMD_HCRESET, uhci->io_addr + USBCMD);
+ mb();
+ udelay(5);
+ if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET)
+ dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
+
+ /* Just to be safe, disable interrupt requests and
+ * make sure the controller is stopped.
*/
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
outw(0, uhci->io_addr + USBINTR);
+ outw(0, uhci->io_addr + USBCMD);
- /* Global reset for 50ms */
- outw(USBCMD_GRESET, io_addr + USBCMD);
- msleep(50);
- outw(0, io_addr + USBCMD);
+ /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
+ * bits in the port status and control registers.
+ * We have to clear them by hand.
+ */
+ for (port = 0; port < uhci->rh_numports; ++port)
+ outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
- /* Another 10ms delay */
- msleep(10);
- uhci->resume_detect = 0;
- uhci->is_stopped = UHCI_IS_STOPPED;
+ uhci->port_c_suspend = uhci->suspended_ports =
+ uhci->resuming_ports = 0;
uhci->rh_state = UHCI_RH_RESET;
+ uhci->is_stopped = UHCI_IS_STOPPED;
+ uhci_to_hcd(uhci)->state = HC_STATE_HALT;
+ uhci_to_hcd(uhci)->poll_rh = 0;
+}
+
+/*
+ * Last rites for a defunct/nonfunctional controller
+ * or one we don't want to use any more.
+ */
+static void hc_died(struct uhci_hcd *uhci)
+{
+ reset_hc(uhci);
+ uhci->hc_inaccessible = 1;
+ del_timer(&uhci->stall_timer);
}
+/*
+ * Initialize a controller that was newly discovered or has just been
+ * resumed. In either case we can't be sure of its previous state.
+ */
+static void check_and_reset_hc(struct uhci_hcd *uhci)
+{
+ u16 legsup;
+ unsigned int cmd, intr;
+
+ /*
+ * When restarting a suspended controller, we expect all the
+ * settings to be the same as we left them:
+ *
+ * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
+ * Controller is stopped and configured with EGSM set;
+ * No interrupts enabled except possibly Resume Detect.
+ *
+ * If any of these conditions are violated we do a complete reset.
+ */
+ pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup);
+ if (legsup & ~(USBLEGSUP_RO | USBLEGSUP_RWC)) {
+ dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n",
+ __FUNCTION__, legsup);
+ goto reset_needed;
+ }
+
+ cmd = inw(uhci->io_addr + USBCMD);
+ if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
+ dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
+ __FUNCTION__, cmd);
+ goto reset_needed;
+ }
+
+ intr = inw(uhci->io_addr + USBINTR);
+ if (intr & (~USBINTR_RESUME)) {
+ dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
+ __FUNCTION__, intr);
+ goto reset_needed;
+ }
+ return;
+
+reset_needed:
+ dev_dbg(uhci_dev(uhci), "Performing full reset\n");
+ reset_hc(uhci);
+}
+
+/*
+ * Store the basic register settings needed by the controller.
+ */
+static void configure_hc(struct uhci_hcd *uhci)
+{
+ /* Set the frame length to the default: 1 ms exactly */
+ outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
+
+ /* Store the frame list base address */
+ outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
+
+ /* Set the current frame number */
+ outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
+
+ /* Mark controller as running before we enable interrupts */
+ uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
+ mb();
+
+ /* Enable PIRQ */
+ pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
+ USBLEGSUP_DEFAULT);
+}
+
+
static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
{
int port;
return 0;
}
-static void suspend_hc(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
+static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
__releases(uhci->lock)
__acquires(uhci->lock)
{
0 : USBINTR_RESUME);
outw(int_enable, uhci->io_addr + USBINTR);
outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
+ mb();
udelay(5);
/* If we're auto-stopping then no devices have been attached
spin_unlock_irq(&uhci->lock);
msleep(1);
spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) /* Died */
+ return;
}
if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
uhci->rh_state = new_state;
uhci->is_stopped = UHCI_IS_STOPPED;
- uhci->resume_detect = 0;
+ del_timer(&uhci->stall_timer);
+ uhci_to_hcd(uhci)->poll_rh = !int_enable;
uhci_scan_schedule(uhci, NULL);
}
-static void wakeup_hc(struct uhci_hcd *uhci)
+static void start_rh(struct uhci_hcd *uhci)
+{
+ uhci->is_stopped = 0;
+ smp_wmb();
+
+ /* Mark it configured and running with a 64-byte max packet.
+ * All interrupts are enabled, even though RESUME won't do anything.
+ */
+ outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
+ outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
+ uhci->io_addr + USBINTR);
+ mb();
+ uhci->rh_state = UHCI_RH_RUNNING;
+ uhci_to_hcd(uhci)->poll_rh = 1;
+ restart_timer(uhci);
+}
+
+static void wakeup_rh(struct uhci_hcd *uhci)
__releases(uhci->lock)
__acquires(uhci->lock)
{
spin_unlock_irq(&uhci->lock);
msleep(20);
spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) /* Died */
+ return;
/* End Global Resume and wait for EOP to be sent */
outw(USBCMD_CF, uhci->io_addr + USBCMD);
+ mb();
udelay(4);
if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
}
- uhci->rh_state = UHCI_RH_RUNNING;
- uhci->is_stopped = 0;
- smp_wmb();
-
- /* Mark it configured and running with a 64-byte max packet.
- * All interrupts are enabled, even though RD won't do anything.
- */
- outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
- outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
- uhci->io_addr + USBINTR);
-}
-
-static int start_hc(struct uhci_hcd *uhci)
-{
- unsigned long io_addr = uhci->io_addr;
- int timeout = 10;
-
- /*
- * Reset the HC - this will force us to get a
- * new notification of any already connected
- * ports due to the virtual disconnect that it
- * implies.
- */
- outw(USBCMD_HCRESET, io_addr + USBCMD);
- while (inw(io_addr + USBCMD) & USBCMD_HCRESET) {
- if (--timeout < 0) {
- dev_err(uhci_dev(uhci), "USBCMD_HCRESET timed out!\n");
- return -ETIMEDOUT;
- }
- msleep(1);
- }
-
- /* Mark controller as running before we enable interrupts */
- uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
+ start_rh(uhci);
- /* Turn on PIRQ and all interrupts */
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
- USBLEGSUP_DEFAULT);
- outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
- io_addr + USBINTR);
-
- /* Start at frame 0 */
- outw(0, io_addr + USBFRNUM);
- outl(uhci->fl->dma_handle, io_addr + USBFLBASEADD);
-
- /* Run and mark it configured with a 64-byte max packet */
- uhci->rh_state = UHCI_RH_RUNNING;
- outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, io_addr + USBCMD);
- uhci->is_stopped = 0;
-
- return 0;
-}
-
-static void rh_state_transitions(struct uhci_hcd *uhci)
-{
- switch (uhci->rh_state) {
- case UHCI_RH_RUNNING:
- /* are any devices attached? */
- if (!any_ports_active(uhci)) {
- uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
- uhci->auto_stop_time = jiffies + HZ;
- }
- break;
-
- case UHCI_RH_RUNNING_NODEVS:
- /* auto-stop if nothing connected for 1 second */
- if (any_ports_active(uhci))
- uhci->rh_state = UHCI_RH_RUNNING;
- else if (time_after_eq(jiffies, uhci->auto_stop_time))
- suspend_hc(uhci, UHCI_RH_AUTO_STOPPED);
- break;
-
- case UHCI_RH_AUTO_STOPPED:
- /* wakeup if requested by a device */
- if (uhci->resume_detect)
- wakeup_hc(uhci);
- break;
-
- default:
- break;
- }
+ /* Restart root hub polling */
+ mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
}
static void stall_callback(unsigned long _uhci)
uhci_scan_schedule(uhci, NULL);
check_fsbr(uhci);
- /* Poll for and perform state transitions */
- rh_state_transitions(uhci);
- if (unlikely(uhci->suspended_ports))
- uhci_check_ports(uhci);
-
- restart_timer(uhci);
+ if (!uhci->is_stopped)
+ restart_timer(uhci);
spin_unlock_irqrestore(&uhci->lock, flags);
}
static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
- unsigned long io_addr = uhci->io_addr;
unsigned short status;
+ unsigned long flags;
/*
* Read the interrupt status, and write it back to clear the
* interrupt cause. Contrary to the UHCI specification, the
* "HC Halted" status bit is persistent: it is RO, not R/WC.
*/
- status = inw(io_addr + USBSTS);
+ status = inw(uhci->io_addr + USBSTS);
if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
return IRQ_NONE;
- outw(status, io_addr + USBSTS); /* Clear it */
+ outw(status, uhci->io_addr + USBSTS); /* Clear it */
if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
if (status & USBSTS_HSE)
if (status & USBSTS_HCPE)
dev_err(uhci_dev(uhci), "host controller process "
"error, something bad happened!\n");
- if ((status & USBSTS_HCH) &&
- uhci->rh_state >= UHCI_RH_RUNNING) {
- dev_err(uhci_dev(uhci), "host controller halted, "
+ if (status & USBSTS_HCH) {
+ spin_lock_irqsave(&uhci->lock, flags);
+ if (uhci->rh_state >= UHCI_RH_RUNNING) {
+ dev_err(uhci_dev(uhci),
+ "host controller halted, "
"very bad!\n");
- /* FIXME: Reset the controller, fix the offending TD */
+ hc_died(uhci);
+ spin_unlock_irqrestore(&uhci->lock, flags);
+ return IRQ_HANDLED;
+ }
+ spin_unlock_irqrestore(&uhci->lock, flags);
}
}
if (status & USBSTS_RD)
- uhci->resume_detect = 1;
+ usb_hcd_poll_rh_status(hcd);
- spin_lock(&uhci->lock);
+ spin_lock_irqsave(&uhci->lock, flags);
uhci_scan_schedule(uhci, regs);
- spin_unlock(&uhci->lock);
+ spin_unlock_irqrestore(&uhci->lock, flags);
return IRQ_HANDLED;
}
static int uhci_reset(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ unsigned io_size = (unsigned) hcd->rsrc_len;
+ int port;
uhci->io_addr = (unsigned long) hcd->rsrc_start;
- /* Kick BIOS off this hardware and reset, so we won't get
- * interrupts from any previous setup.
+ /* The UHCI spec says devices must have 2 ports, and goes on to say
+ * they may have more but gives no way to determine how many there
+ * are. However according to the UHCI spec, Bit 7 of the port
+ * status and control register is always set to 1. So we try to
+ * use this to our advantage. Another common failure mode when
+ * a nonexistent register is addressed is to return all ones, so
+ * we test for that also.
*/
- reset_hc(uhci);
+ for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
+ unsigned int portstatus;
+
+ portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
+ if (!(portstatus & 0x0080) || portstatus == 0xffff)
+ break;
+ }
+ if (debug)
+ dev_info(uhci_dev(uhci), "detected %d ports\n", port);
+
+ /* Anything greater than 7 is weird so we'll ignore it. */
+ if (port > UHCI_RH_MAXCHILD) {
+ dev_info(uhci_dev(uhci), "port count misdetected? "
+ "forcing to 2 ports\n");
+ port = 2;
+ }
+ uhci->rh_numports = port;
+
+ /* Kick BIOS off this hardware and reset if the controller
+ * isn't already safely quiescent.
+ */
+ check_and_reset_hc(uhci);
return 0;
}
+/* Make sure the controller is quiescent and that we're not using it
+ * any more. This is mainly for the benefit of programs which, like kexec,
+ * expect the hardware to be idle: not doing DMA or generating IRQs.
+ *
+ * This routine may be called in a damaged or failing kernel. Hence we
+ * do not acquire the spinlock before shutting down the controller.
+ */
+static void uhci_shutdown(struct pci_dev *pdev)
+{
+ struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
+
+ hc_died(hcd_to_uhci(hcd));
+}
+
/*
* Allocate a frame list, and then setup the skeleton
*
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
int retval = -EBUSY;
- int i, port;
- unsigned io_size;
+ int i;
dma_addr_t dma_handle;
- struct usb_device *udev;
struct dentry *dentry;
- io_size = (unsigned) hcd->rsrc_len;
+ hcd->uses_new_polling = 1;
+ if (pci_find_capability(to_pci_dev(uhci_dev(uhci)), PCI_CAP_ID_PM))
+ hcd->can_wakeup = 1; /* Assume it supports PME# */
- dentry = debugfs_create_file(hcd->self.bus_name, S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, &uhci_debug_operations);
+ dentry = debugfs_create_file(hcd->self.bus_name,
+ S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci,
+ &uhci_debug_operations);
if (!dentry) {
- dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
+ dev_err(uhci_dev(uhci),
+ "couldn't create uhci debugfs entry\n");
retval = -ENOMEM;
goto err_create_debug_entry;
}
goto err_create_qh_pool;
}
- /* Initialize the root hub */
-
- /* UHCI specs says devices must have 2 ports, but goes on to say */
- /* they may have more but give no way to determine how many they */
- /* have. However, according to the UHCI spec, Bit 7 is always set */
- /* to 1. So we try to use this to our advantage */
- for (port = 0; port < (io_size - 0x10) / 2; port++) {
- unsigned int portstatus;
-
- portstatus = inw(uhci->io_addr + 0x10 + (port * 2));
- if (!(portstatus & 0x0080))
- break;
- }
- if (debug)
- dev_info(uhci_dev(uhci), "detected %d ports\n", port);
-
- /* This is experimental so anything less than 2 or greater than 8 is */
- /* something weird and we'll ignore it */
- if (port < 2 || port > UHCI_RH_MAXCHILD) {
- dev_info(uhci_dev(uhci), "port count misdetected? "
- "forcing to 2 ports\n");
- port = 2;
- }
-
- uhci->rh_numports = port;
-
- udev = usb_alloc_dev(NULL, &hcd->self, 0);
- if (!udev) {
- dev_err(uhci_dev(uhci), "unable to allocate root hub\n");
- goto err_alloc_root_hub;
- }
-
- uhci->term_td = uhci_alloc_td(uhci, udev);
+ uhci->term_td = uhci_alloc_td(uhci);
if (!uhci->term_td) {
dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
goto err_alloc_term_td;
}
for (i = 0; i < UHCI_NUM_SKELQH; i++) {
- uhci->skelqh[i] = uhci_alloc_qh(uhci, udev);
+ uhci->skelqh[i] = uhci_alloc_qh(uhci);
if (!uhci->skelqh[i]) {
dev_err(uhci_dev(uhci), "unable to allocate QH\n");
goto err_alloc_skelqh;
/*
* Some architectures require a full mb() to enforce completion of
- * the memory writes above before the I/O transfers in start_hc().
+ * the memory writes above before the I/O transfers in configure_hc().
*/
mb();
- if ((retval = start_hc(uhci)) != 0)
- goto err_alloc_skelqh;
-
- restart_timer(uhci);
-
- udev->speed = USB_SPEED_FULL;
-
- if (usb_hcd_register_root_hub(udev, hcd) != 0) {
- dev_err(uhci_dev(uhci), "unable to start root hub\n");
- retval = -ENOMEM;
- goto err_start_root_hub;
- }
+ configure_hc(uhci);
+ start_rh(uhci);
return 0;
/*
* error exits:
*/
-err_start_root_hub:
- reset_hc(uhci);
-
- del_timer_sync(&uhci->stall_timer);
-
err_alloc_skelqh:
for (i = 0; i < UHCI_NUM_SKELQH; i++)
if (uhci->skelqh[i]) {
uhci->term_td = NULL;
err_alloc_term_td:
- usb_put_dev(udev);
-
-err_alloc_root_hub:
dma_pool_destroy(uhci->qh_pool);
uhci->qh_pool = NULL;
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
- del_timer_sync(&uhci->stall_timer);
- reset_hc(uhci);
-
spin_lock_irq(&uhci->lock);
+ reset_hc(uhci);
uhci_scan_schedule(uhci, NULL);
spin_unlock_irq(&uhci->lock);
-
+
+ del_timer_sync(&uhci->stall_timer);
release_uhci(uhci);
}
#ifdef CONFIG_PM
-static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
+static int uhci_rh_suspend(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
spin_lock_irq(&uhci->lock);
- suspend_hc(uhci, UHCI_RH_SUSPENDED);
+ if (!uhci->hc_inaccessible) /* Not dead */
+ suspend_rh(uhci, UHCI_RH_SUSPENDED);
spin_unlock_irq(&uhci->lock);
return 0;
}
+static int uhci_rh_resume(struct usb_hcd *hcd)
+{
+ struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ int rc = 0;
+
+ spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) {
+ if (uhci->rh_state == UHCI_RH_SUSPENDED) {
+ dev_warn(uhci_dev(uhci), "HC isn't running!\n");
+ rc = -ENODEV;
+ }
+ /* Otherwise the HC is dead */
+ } else
+ wakeup_rh(uhci);
+ spin_unlock_irq(&uhci->lock);
+ return rc;
+}
+
+static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
+{
+ struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ int rc = 0;
+
+ dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
+
+ spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) /* Dead or already suspended */
+ goto done;
+
+#ifndef CONFIG_USB_SUSPEND
+ /* Otherwise this would never happen */
+ suspend_rh(uhci, UHCI_RH_SUSPENDED);
+#endif
+
+ if (uhci->rh_state > UHCI_RH_SUSPENDED) {
+ dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
+ hcd->state = HC_STATE_RUNNING;
+ rc = -EBUSY;
+ goto done;
+ };
+
+ /* All PCI host controllers are required to disable IRQ generation
+ * at the source, so we must turn off PIRQ.
+ */
+ pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
+ uhci->hc_inaccessible = 1;
+
+ /* FIXME: Enable non-PME# remote wakeup? */
+
+done:
+ spin_unlock_irq(&uhci->lock);
+ if (rc == 0)
+ del_timer_sync(&hcd->rh_timer);
+ return rc;
+}
+
static int uhci_resume(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
+
+ if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
+ return 0;
spin_lock_irq(&uhci->lock);
- if (uhci->rh_state == UHCI_RH_SUSPENDED) {
- /*
- * Some systems don't maintain the UHCI register values
- * during a PM suspend/resume cycle, so reinitialize
- * the Frame Number, Framelist Base Address, Interrupt
- * Enable, and Legacy Support registers.
- */
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
- 0);
- outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
- outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
- outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC |
- USBINTR_SP, uhci->io_addr + USBINTR);
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
- USBLEGSUP_DEFAULT);
- wakeup_hc(uhci);
- }
+ /* FIXME: Disable non-PME# remote wakeup? */
+
+ uhci->hc_inaccessible = 0;
+
+ /* The BIOS may have changed the controller settings during a
+ * system wakeup. Check it and reconfigure to avoid problems.
+ */
+ check_and_reset_hc(uhci);
+ configure_hc(uhci);
+
+#ifndef CONFIG_USB_SUSPEND
+ /* Otherwise this would never happen */
+ wakeup_rh(uhci);
+#endif
+ if (uhci->rh_state == UHCI_RH_RESET)
+ suspend_rh(uhci, UHCI_RH_SUSPENDED);
+
spin_unlock_irq(&uhci->lock);
- hcd->state = HC_STATE_RUNNING;
+ if (hcd->poll_rh)
+ usb_hcd_poll_rh_status(hcd);
return 0;
}
#endif
#ifdef CONFIG_PM
.suspend = uhci_suspend,
.resume = uhci_resume,
+ .hub_suspend = uhci_rh_suspend,
+ .hub_resume = uhci_rh_resume,
#endif
.stop = uhci_stop,
.probe = usb_hcd_pci_probe,
.remove = usb_hcd_pci_remove,
+ .shutdown = uhci_shutdown,
#ifdef CONFIG_PM
.suspend = usb_hcd_pci_suspend,