/*
* QEMU float support
*
- * Derived from SoftFloat.
+ * The code in this source file is derived from release 2a of the SoftFloat
+ * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
+ * some later contributions) are provided under that license, as detailed below.
+ * It has subsequently been modified by contributors to the QEMU Project,
+ * so some portions are provided under:
+ * the SoftFloat-2a license
+ * the BSD license
+ * GPL-v2-or-later
+ *
+ * Any future contributions to this file after December 1st 2014 will be
+ * taken to be licensed under the Softfloat-2a license unless specifically
+ * indicated otherwise.
*/
-/*============================================================================
-
+/*
+===============================================================================
This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
-Arithmetic Package, Release 2b.
+Arithmetic Package, Release 2a.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
-is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
arithmetic/SoftFloat.html'.
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
-been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
-RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
-AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
-COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
-EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
-INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
-OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
+TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
Derivative works are acceptable, even for commercial purposes, so long as
-(1) the source code for the derivative work includes prominent notice that
-the work is derivative, and (2) the source code includes prominent notice with
-these four paragraphs for those parts of this code that are retained.
+(1) they include prominent notice that the work is derivative, and (2) they
+include prominent notice akin to these four paragraphs for those parts of
+this code that are retained.
+
+===============================================================================
+*/
+
+/* BSD licensing:
+ * Copyright (c) 2006, Fabrice Bellard
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors
+ * may be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
-=============================================================================*/
+/* Portions of this work are licensed under the terms of the GNU GPL,
+ * version 2 or later. See the COPYING file in the top-level directory.
+ */
+/* Does the target distinguish signaling NaNs from non-signaling NaNs
+ * by setting the most significant bit of the mantissa for a signaling NaN?
+ * (The more common choice is to have it be zero for SNaN and one for QNaN.)
+ */
#if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
-#define SNAN_BIT_IS_ONE 1
+#define SNAN_BIT_IS_ONE 1
#else
-#define SNAN_BIT_IS_ONE 0
+#define SNAN_BIT_IS_ONE 0
#endif
#if defined(TARGET_XTENSA)
#if defined(TARGET_SPARC)
const float32 float32_default_nan = const_float32(0x7FFFFFFF);
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
- defined(TARGET_XTENSA)
+ defined(TARGET_XTENSA) || defined(TARGET_S390X)
const float32 float32_default_nan = const_float32(0x7FC00000);
#elif SNAN_BIT_IS_ONE
const float32 float32_default_nan = const_float32(0x7FBFFFFF);
*----------------------------------------------------------------------------*/
#if defined(TARGET_SPARC)
const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
-#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
+#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
+ defined(TARGET_S390X)
const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
#elif SNAN_BIT_IS_ONE
-const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF ));
+const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
#else
const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
#endif
*----------------------------------------------------------------------------*/
#if SNAN_BIT_IS_ONE
#define floatx80_default_nan_high 0x7FFF
-#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF )
+#define floatx80_default_nan_low LIT64(0xBFFFFFFFFFFFFFFF)
#else
#define floatx80_default_nan_high 0xFFFF
#define floatx80_default_nan_low LIT64( 0xC000000000000000 )
| `low' values hold the most- and least-significant bits, respectively.
*----------------------------------------------------------------------------*/
#if SNAN_BIT_IS_ONE
-#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF )
-#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
+#define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
+#define float128_default_nan_low LIT64(0xFFFFFFFFFFFFFFFF)
+#elif defined(TARGET_S390X)
+#define float128_default_nan_high LIT64( 0x7FFF800000000000 )
+#define float128_default_nan_low LIT64( 0x0000000000000000 )
#else
#define float128_default_nan_high LIT64( 0xFFFF800000000000 )
#define float128_default_nan_low LIT64( 0x0000000000000000 )
| should be simply `float_exception_flags |= flags;'.
*----------------------------------------------------------------------------*/
-void float_raise( int8 flags STATUS_PARAM )
+void float_raise(int8 flags, float_status *status)
{
- STATUS(float_exception_flags) |= flags;
+ status->float_exception_flags |= flags;
}
/*----------------------------------------------------------------------------
| exception is raised.
*----------------------------------------------------------------------------*/
-static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM )
+static commonNaNT float16ToCommonNaN(float16 a, float_status *status)
{
commonNaNT z;
- if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
+ if (float16_is_signaling_nan(a)) {
+ float_raise(float_flag_invalid, status);
+ }
z.sign = float16_val(a) >> 15;
z.low = 0;
z.high = ((uint64_t) float16_val(a))<<54;
| precision floating-point format.
*----------------------------------------------------------------------------*/
-static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM)
+static float16 commonNaNToFloat16(commonNaNT a, float_status *status)
{
uint16_t mantissa = a.high>>54;
- if (STATUS(default_nan_mode)) {
+ if (status->default_nan_mode) {
return float16_default_nan;
}
{
uint32_t a = float32_val(a_);
#if SNAN_BIT_IS_ONE
- return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
+ return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
#else
- return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
+ return ((uint32_t)(a << 1) >= 0xff800000);
#endif
}
{
uint32_t a = float32_val(a_);
#if SNAN_BIT_IS_ONE
- return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
+ return ((uint32_t)(a << 1) >= 0xff800000);
#else
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
#endif
| exception is raised.
*----------------------------------------------------------------------------*/
-static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
+static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
{
commonNaNT z;
- if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
+ if (float32_is_signaling_nan(a)) {
+ float_raise(float_flag_invalid, status);
+ }
z.sign = float32_val(a)>>31;
z.low = 0;
z.high = ( (uint64_t) float32_val(a) )<<41;
| precision floating-point format.
*----------------------------------------------------------------------------*/
-static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
+static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
{
uint32_t mantissa = a.high>>41;
- if ( STATUS(default_nan_mode) ) {
+ if (status->default_nan_mode) {
return float32_default_nan;
}
*----------------------------------------------------------------------------*/
#if defined(TARGET_ARM)
static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
- flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
+ flag cIsQNaN, flag cIsSNaN, flag infzero,
+ float_status *status)
{
/* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
* the default NaN
*/
if (infzero && cIsQNaN) {
- float_raise(float_flag_invalid STATUS_VAR);
+ float_raise(float_flag_invalid, status);
return 3;
}
return 1;
}
}
+#elif defined(TARGET_MIPS)
+static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
+ flag cIsQNaN, flag cIsSNaN, flag infzero,
+ float_status *status)
+{
+ /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
+ * the default NaN
+ */
+ if (infzero) {
+ float_raise(float_flag_invalid, status);
+ return 3;
+ }
+
+ /* Prefer sNaN over qNaN, in the a, b, c order. */
+ if (aIsSNaN) {
+ return 0;
+ } else if (bIsSNaN) {
+ return 1;
+ } else if (cIsSNaN) {
+ return 2;
+ } else if (aIsQNaN) {
+ return 0;
+ } else if (bIsQNaN) {
+ return 1;
+ } else {
+ return 2;
+ }
+}
#elif defined(TARGET_PPC)
static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
- flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
+ flag cIsQNaN, flag cIsSNaN, flag infzero,
+ float_status *status)
{
/* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
* to return an input NaN if we have one (ie c) rather than generating
* a default NaN
*/
if (infzero) {
- float_raise(float_flag_invalid STATUS_VAR);
+ float_raise(float_flag_invalid, status);
return 2;
}
* This is unlikely to actually match any real implementation.
*/
static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
- flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
+ flag cIsQNaN, flag cIsSNaN, flag infzero,
+ float_status *status)
{
if (aIsSNaN || aIsQNaN) {
return 0;
| signaling NaN, the invalid exception is raised.
*----------------------------------------------------------------------------*/
-static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
+static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
flag aIsLargerSignificand;
av = float32_val(a);
bv = float32_val(b);
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
+ if (aIsSignalingNaN | bIsSignalingNaN) {
+ float_raise(float_flag_invalid, status);
+ }
- if ( STATUS(default_nan_mode) )
+ if (status->default_nan_mode)
return float32_default_nan;
if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
*----------------------------------------------------------------------------*/
static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
- float32 c, flag infzero STATUS_PARAM)
+ float32 c, flag infzero,
+ float_status *status)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
cIsQuietNaN, cIsSignalingNaN;
cIsSignalingNaN = float32_is_signaling_nan(c);
if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
- float_raise(float_flag_invalid STATUS_VAR);
+ float_raise(float_flag_invalid, status);
}
which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
bIsQuietNaN, bIsSignalingNaN,
- cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
+ cIsQuietNaN, cIsSignalingNaN, infzero, status);
- if (STATUS(default_nan_mode)) {
+ if (status->default_nan_mode) {
/* Note that this check is after pickNaNMulAdd so that function
* has an opportunity to set the Invalid flag.
*/
{
uint64_t a = float64_val(a_);
#if SNAN_BIT_IS_ONE
- return
- ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
- && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
+ return (((a >> 51) & 0xfff) == 0xffe)
+ && (a & 0x0007ffffffffffffULL);
#else
- return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
+ return ((a << 1) >= 0xfff0000000000000ULL);
#endif
}
{
uint64_t a = float64_val(a_);
#if SNAN_BIT_IS_ONE
- return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
+ return ((a << 1) >= 0xfff0000000000000ULL);
#else
return
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
| exception is raised.
*----------------------------------------------------------------------------*/
-static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
+static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
{
commonNaNT z;
- if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
+ if (float64_is_signaling_nan(a)) {
+ float_raise(float_flag_invalid, status);
+ }
z.sign = float64_val(a)>>63;
z.low = 0;
z.high = float64_val(a)<<12;
| precision floating-point format.
*----------------------------------------------------------------------------*/
-static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
+static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
{
uint64_t mantissa = a.high>>12;
- if ( STATUS(default_nan_mode) ) {
+ if (status->default_nan_mode) {
return float64_default_nan;
}
| signaling NaN, the invalid exception is raised.
*----------------------------------------------------------------------------*/
-static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
+static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
flag aIsLargerSignificand;
av = float64_val(a);
bv = float64_val(b);
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
+ if (aIsSignalingNaN | bIsSignalingNaN) {
+ float_raise(float_flag_invalid, status);
+ }
- if ( STATUS(default_nan_mode) )
+ if (status->default_nan_mode)
return float64_default_nan;
if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
*----------------------------------------------------------------------------*/
static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
- float64 c, flag infzero STATUS_PARAM)
+ float64 c, flag infzero,
+ float_status *status)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
cIsQuietNaN, cIsSignalingNaN;
cIsSignalingNaN = float64_is_signaling_nan(c);
if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
- float_raise(float_flag_invalid STATUS_VAR);
+ float_raise(float_flag_invalid, status);
}
which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
bIsQuietNaN, bIsSignalingNaN,
- cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
+ cIsQuietNaN, cIsSignalingNaN, infzero, status);
- if (STATUS(default_nan_mode)) {
+ if (status->default_nan_mode) {
/* Note that this check is after pickNaNMulAdd so that function
* has an opportunity to set the Invalid flag.
*/
#if SNAN_BIT_IS_ONE
uint64_t aLow;
- aLow = a.low & ~ LIT64( 0x4000000000000000 );
- return
- ( ( a.high & 0x7FFF ) == 0x7FFF )
- && (uint64_t) ( aLow<<1 )
- && ( a.low == aLow );
+ aLow = a.low & ~0x4000000000000000ULL;
+ return ((a.high & 0x7fff) == 0x7fff)
+ && (aLow << 1)
+ && (a.low == aLow);
#else
return ( ( a.high & 0x7FFF ) == 0x7FFF )
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
int floatx80_is_signaling_nan( floatx80 a )
{
#if SNAN_BIT_IS_ONE
- return ( ( a.high & 0x7FFF ) == 0x7FFF )
- && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
+ return ((a.high & 0x7fff) == 0x7fff)
+ && ((a.low << 1) >= 0x8000000000000000ULL);
#else
uint64_t aLow;
| invalid exception is raised.
*----------------------------------------------------------------------------*/
-static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
+static commonNaNT floatx80ToCommonNaN(floatx80 a, float_status *status)
{
commonNaNT z;
- if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
+ if (floatx80_is_signaling_nan(a)) {
+ float_raise(float_flag_invalid, status);
+ }
if ( a.low >> 63 ) {
z.sign = a.high >> 15;
z.low = 0;
| double-precision floating-point format.
*----------------------------------------------------------------------------*/
-static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
+static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
{
floatx80 z;
- if ( STATUS(default_nan_mode) ) {
+ if (status->default_nan_mode) {
z.low = floatx80_default_nan_low;
z.high = floatx80_default_nan_high;
return z;
| `b' is a signaling NaN, the invalid exception is raised.
*----------------------------------------------------------------------------*/
-static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
+static floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b,
+ float_status *status)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
flag aIsLargerSignificand;
bIsQuietNaN = floatx80_is_quiet_nan( b );
bIsSignalingNaN = floatx80_is_signaling_nan( b );
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
+ if (aIsSignalingNaN | bIsSignalingNaN) {
+ float_raise(float_flag_invalid, status);
+ }
- if ( STATUS(default_nan_mode) ) {
+ if (status->default_nan_mode) {
a.low = floatx80_default_nan_low;
a.high = floatx80_default_nan_high;
return a;
int float128_is_quiet_nan( float128 a )
{
#if SNAN_BIT_IS_ONE
- return
- ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
- && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
+ return (((a.high >> 47) & 0xffff) == 0xfffe)
+ && (a.low || (a.high & 0x00007fffffffffffULL));
#else
return
- ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
- && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
+ ((a.high << 1) >= 0xffff000000000000ULL)
+ && (a.low || (a.high & 0x0000ffffffffffffULL));
#endif
}
{
#if SNAN_BIT_IS_ONE
return
- ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
- && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
+ ((a.high << 1) >= 0xffff000000000000ULL)
+ && (a.low || (a.high & 0x0000ffffffffffffULL));
#else
return
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
| exception is raised.
*----------------------------------------------------------------------------*/
-static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
+static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
{
commonNaNT z;
- if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
+ if (float128_is_signaling_nan(a)) {
+ float_raise(float_flag_invalid, status);
+ }
z.sign = a.high>>63;
shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
return z;
| precision floating-point format.
*----------------------------------------------------------------------------*/
-static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
+static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
{
float128 z;
- if ( STATUS(default_nan_mode) ) {
+ if (status->default_nan_mode) {
z.low = float128_default_nan_low;
z.high = float128_default_nan_high;
return z;
| `b' is a signaling NaN, the invalid exception is raised.
*----------------------------------------------------------------------------*/
-static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
+static float128 propagateFloat128NaN(float128 a, float128 b,
+ float_status *status)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
flag aIsLargerSignificand;
bIsQuietNaN = float128_is_quiet_nan( b );
bIsSignalingNaN = float128_is_signaling_nan( b );
- if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
+ if (aIsSignalingNaN | bIsSignalingNaN) {
+ float_raise(float_flag_invalid, status);
+ }
- if ( STATUS(default_nan_mode) ) {
+ if (status->default_nan_mode) {
a.low = float128_default_nan_low;
a.high = float128_default_nan_high;
return a;
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