* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include "config.h"
-#include "qemu-common.h"
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/error-report.h"
+#include "qemu/cutils.h"
+#include "cpu.h"
#ifdef CONFIG_USER_ONLY
-#include <stdlib.h>
-#include <stdio.h>
-#include <stdarg.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-#include <fcntl.h>
-
#include "qemu.h"
#else
#include "monitor/monitor.h"
#define MAX_PACKET_LENGTH 4096
-#include "cpu.h"
#include "qemu/sockets.h"
+#include "sysemu/hw_accel.h"
#include "sysemu/kvm.h"
-#include "qemu/bitops.h"
+#include "exec/semihost.h"
+#include "exec/exec-all.h"
+
+#ifdef CONFIG_USER_ONLY
+#define GDB_ATTACHED "0"
+#else
+#define GDB_ATTACHED "1"
+#endif
static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr,
uint8_t *buf, int len, bool is_write)
int fd;
int running_state;
#else
- CharDriverState *chr;
- CharDriverState *mon_chr;
+ CharBackend chr;
+ Chardev *mon_chr;
#endif
char syscall_buf[256];
gdb_syscall_complete_cb current_syscall_cb;
static GDBState *gdbserver_state;
-/* This is an ugly hack to cope with both new and old gdb.
- If gdb sends qXfer:features:read then assume we're talking to a newish
- gdb that understands target descriptions. */
-static int gdb_has_xml;
+bool gdb_has_xml;
#ifdef CONFIG_USER_ONLY
/* XXX: This is not thread safe. Do we care? */
if (ret < 0) {
if (errno == ECONNRESET)
s->fd = -1;
- if (errno != EINTR && errno != EAGAIN)
+ if (errno != EINTR)
return -1;
} else if (ret == 0) {
close(s->fd);
GDB_SYS_DISABLED,
} gdb_syscall_mode;
-/* If gdb is connected when the first semihosting syscall occurs then use
- remote gdb syscalls. Otherwise use native file IO. */
+/* Decide if either remote gdb syscalls or native file IO should be used. */
int use_gdb_syscalls(void)
{
+ SemihostingTarget target = semihosting_get_target();
+ if (target == SEMIHOSTING_TARGET_NATIVE) {
+ /* -semihosting-config target=native */
+ return false;
+ } else if (target == SEMIHOSTING_TARGET_GDB) {
+ /* -semihosting-config target=gdb */
+ return true;
+ }
+
+ /* -semihosting-config target=auto */
+ /* On the first call check if gdb is connected and remember. */
if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
: GDB_SYS_DISABLED);
#ifdef CONFIG_USER_ONLY
s->running_state = 1;
#else
- if (runstate_check(RUN_STATE_GUEST_PANICKED)) {
- runstate_set(RUN_STATE_DEBUG);
- }
if (!runstate_needs_reset()) {
vm_start();
}
#endif
}
-static void put_buffer(GDBState *s, const uint8_t *buf, int len)
-{
-#ifdef CONFIG_USER_ONLY
- int ret;
-
- while (len > 0) {
- ret = send(s->fd, buf, len, 0);
- if (ret < 0) {
- if (errno != EINTR && errno != EAGAIN)
- return;
- } else {
- buf += ret;
- len -= ret;
- }
- }
-#else
- qemu_chr_fe_write(s->chr, buf, len);
-#endif
-}
-
-static inline int fromhex(int v)
-{
- if (v >= '0' && v <= '9')
- return v - '0';
- else if (v >= 'A' && v <= 'F')
- return v - 'A' + 10;
- else if (v >= 'a' && v <= 'f')
- return v - 'a' + 10;
- else
- return 0;
-}
-
-static inline int tohex(int v)
-{
- if (v < 10)
- return v + '0';
- else
- return v - 10 + 'a';
-}
-
-static void memtohex(char *buf, const uint8_t *mem, int len)
-{
- int i, c;
- char *q;
- q = buf;
- for(i = 0; i < len; i++) {
- c = mem[i];
- *q++ = tohex(c >> 4);
- *q++ = tohex(c & 0xf);
- }
- *q = '\0';
-}
-
-static void hextomem(uint8_t *mem, const char *buf, int len)
-{
- int i;
-
- for(i = 0; i < len; i++) {
- mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
- buf += 2;
- }
-}
-
-/* return -1 if error, 0 if OK */
-static int put_packet_binary(GDBState *s, const char *buf, int len)
-{
- int csum, i;
- uint8_t *p;
-
- for(;;) {
- p = s->last_packet;
- *(p++) = '$';
- memcpy(p, buf, len);
- p += len;
- csum = 0;
- for(i = 0; i < len; i++) {
- csum += buf[i];
- }
- *(p++) = '#';
- *(p++) = tohex((csum >> 4) & 0xf);
- *(p++) = tohex((csum) & 0xf);
-
- s->last_packet_len = p - s->last_packet;
- put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
-
-#ifdef CONFIG_USER_ONLY
- i = get_char(s);
- if (i < 0)
- return -1;
- if (i == '+')
- break;
-#else
- break;
-#endif
- }
- return 0;
-}
-
-/* return -1 if error, 0 if OK */
-static int put_packet(GDBState *s, const char *buf)
-{
-#ifdef DEBUG_GDB
- printf("reply='%s'\n", buf);
-#endif
-
- return put_packet_binary(s, buf, strlen(buf));
-}
-
-/* The GDB remote protocol transfers values in target byte order. This means
- we can use the raw memory access routines to access the value buffer.
- Conveniently, these also handle the case where the buffer is mis-aligned.
+/*
+ * Resume execution, per CPU actions. For user-mode emulation it's
+ * equivalent to gdb_continue.
*/
-#define GET_REG8(val) do { \
- stb_p(mem_buf, val); \
- return 1; \
- } while(0)
-#define GET_REG16(val) do { \
- stw_p(mem_buf, val); \
- return 2; \
- } while(0)
-#define GET_REG32(val) do { \
- stl_p(mem_buf, val); \
- return 4; \
- } while(0)
-#define GET_REG64(val) do { \
- stq_p(mem_buf, val); \
- return 8; \
- } while(0)
-
-#if TARGET_LONG_BITS == 64
-#define GET_REGL(val) GET_REG64(val)
-#define ldtul_p(addr) ldq_p(addr)
-#else
-#define GET_REGL(val) GET_REG32(val)
-#define ldtul_p(addr) ldl_p(addr)
-#endif
-
-#if defined(TARGET_I386)
-
-#include "target-i386/gdbstub.c"
-
-#elif defined (TARGET_PPC)
-
-/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
- expects whatever the target description contains. Due to a
- historical mishap the FP registers appear in between core integer
- regs and PC, MSR, CR, and so forth. We hack round this by giving the
- FP regs zero size when talking to a newer gdb. */
-#if defined (TARGET_PPC64)
-#define GDB_CORE_XML "power64-core.xml"
-#else
-#define GDB_CORE_XML "power-core.xml"
-#endif
-
-static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n)
-{
- if (n < 32) {
- /* gprs */
- GET_REGL(env->gpr[n]);
- } else if (n < 64) {
- /* fprs */
- if (gdb_has_xml) {
- return 0;
- }
- stfq_p(mem_buf, env->fpr[n-32]);
- return 8;
- } else {
- switch (n) {
- case 64:
- GET_REGL(env->nip);
- case 65:
- GET_REGL(env->msr);
- case 66:
- {
- uint32_t cr = 0;
- int i;
- for (i = 0; i < 8; i++) {
- cr |= env->crf[i] << (32 - ((i + 1) * 4));
- }
- GET_REG32(cr);
- }
- case 67:
- GET_REGL(env->lr);
- case 68:
- GET_REGL(env->ctr);
- case 69:
- GET_REGL(env->xer);
- case 70:
- {
- if (gdb_has_xml) {
- return 0;
- }
- GET_REG32(env->fpscr);
- }
- }
- }
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUPPCState *env, uint8_t *mem_buf, int n)
-{
- if (n < 32) {
- /* gprs */
- env->gpr[n] = ldtul_p(mem_buf);
- return sizeof(target_ulong);
- } else if (n < 64) {
- /* fprs */
- if (gdb_has_xml) {
- return 0;
- }
- env->fpr[n-32] = ldfq_p(mem_buf);
- return 8;
- } else {
- switch (n) {
- case 64:
- env->nip = ldtul_p(mem_buf);
- return sizeof(target_ulong);
- case 65:
- ppc_store_msr(env, ldtul_p(mem_buf));
- return sizeof(target_ulong);
- case 66:
- {
- uint32_t cr = ldl_p(mem_buf);
- int i;
- for (i = 0; i < 8; i++) {
- env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
- }
- return 4;
- }
- case 67:
- env->lr = ldtul_p(mem_buf);
- return sizeof(target_ulong);
- case 68:
- env->ctr = ldtul_p(mem_buf);
- return sizeof(target_ulong);
- case 69:
- env->xer = ldtul_p(mem_buf);
- return sizeof(target_ulong);
- case 70:
- /* fpscr */
- if (gdb_has_xml) {
- return 0;
- }
- store_fpscr(env, ldtul_p(mem_buf), 0xffffffff);
- return sizeof(target_ulong);
- }
- }
- return 0;
-}
-
-#elif defined (TARGET_SPARC)
-
-#ifdef TARGET_ABI32
-#define GET_REGA(val) GET_REG32(val)
-#else
-#define GET_REGA(val) GET_REGL(val)
-#endif
-
-static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n)
-{
- if (n < 8) {
- /* g0..g7 */
- GET_REGA(env->gregs[n]);
- }
- if (n < 32) {
- /* register window */
- GET_REGA(env->regwptr[n - 8]);
- }
-#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
- if (n < 64) {
- /* fprs */
- if (n & 1) {
- GET_REG32(env->fpr[(n - 32) / 2].l.lower);
- } else {
- GET_REG32(env->fpr[(n - 32) / 2].l.upper);
- }
- }
- /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
- switch (n) {
- case 64:
- GET_REGA(env->y);
- case 65:
- GET_REGA(cpu_get_psr(env));
- case 66:
- GET_REGA(env->wim);
- case 67:
- GET_REGA(env->tbr);
- case 68:
- GET_REGA(env->pc);
- case 69:
- GET_REGA(env->npc);
- case 70:
- GET_REGA(env->fsr);
- case 71:
- GET_REGA(0); /* csr */
- default:
- GET_REGA(0);
- }
-#else
- if (n < 64) {
- /* f0-f31 */
- if (n & 1) {
- GET_REG32(env->fpr[(n - 32) / 2].l.lower);
- } else {
- GET_REG32(env->fpr[(n - 32) / 2].l.upper);
- }
- }
- if (n < 80) {
- /* f32-f62 (double width, even numbers only) */
- GET_REG64(env->fpr[(n - 32) / 2].ll);
- }
- switch (n) {
- case 80:
- GET_REGL(env->pc);
- case 81:
- GET_REGL(env->npc);
- case 82:
- GET_REGL((cpu_get_ccr(env) << 32) |
- ((env->asi & 0xff) << 24) |
- ((env->pstate & 0xfff) << 8) |
- cpu_get_cwp64(env));
- case 83:
- GET_REGL(env->fsr);
- case 84:
- GET_REGL(env->fprs);
- case 85:
- GET_REGL(env->y);
- }
-#endif
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUSPARCState *env, uint8_t *mem_buf, int n)
+static int gdb_continue_partial(GDBState *s, char *newstates)
{
-#if defined(TARGET_ABI32)
- abi_ulong tmp;
-
- tmp = ldl_p(mem_buf);
-#else
- target_ulong tmp;
-
- tmp = ldtul_p(mem_buf);
-#endif
-
- if (n < 8) {
- /* g0..g7 */
- env->gregs[n] = tmp;
- } else if (n < 32) {
- /* register window */
- env->regwptr[n - 8] = tmp;
- }
-#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
- else if (n < 64) {
- /* fprs */
- /* f0-f31 */
- if (n & 1) {
- env->fpr[(n - 32) / 2].l.lower = tmp;
- } else {
- env->fpr[(n - 32) / 2].l.upper = tmp;
- }
- } else {
- /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
- switch (n) {
- case 64:
- env->y = tmp;
- break;
- case 65:
- cpu_put_psr(env, tmp);
- break;
- case 66:
- env->wim = tmp;
- break;
- case 67:
- env->tbr = tmp;
- break;
- case 68:
- env->pc = tmp;
- break;
- case 69:
- env->npc = tmp;
- break;
- case 70:
- env->fsr = tmp;
- break;
- default:
- return 0;
+ CPUState *cpu;
+ int res = 0;
+#ifdef CONFIG_USER_ONLY
+ /*
+ * This is not exactly accurate, but it's an improvement compared to the
+ * previous situation, where only one CPU would be single-stepped.
+ */
+ CPU_FOREACH(cpu) {
+ if (newstates[cpu->cpu_index] == 's') {
+ cpu_single_step(cpu, sstep_flags);
}
}
- return 4;
+ s->running_state = 1;
#else
- else if (n < 64) {
- /* f0-f31 */
- tmp = ldl_p(mem_buf);
- if (n & 1) {
- env->fpr[(n - 32) / 2].l.lower = tmp;
- } else {
- env->fpr[(n - 32) / 2].l.upper = tmp;
- }
- return 4;
- } else if (n < 80) {
- /* f32-f62 (double width, even numbers only) */
- env->fpr[(n - 32) / 2].ll = tmp;
- } else {
- switch (n) {
- case 80:
- env->pc = tmp;
- break;
- case 81:
- env->npc = tmp;
- break;
- case 82:
- cpu_put_ccr(env, tmp >> 32);
- env->asi = (tmp >> 24) & 0xff;
- env->pstate = (tmp >> 8) & 0xfff;
- cpu_put_cwp64(env, tmp & 0xff);
- break;
- case 83:
- env->fsr = tmp;
- break;
- case 84:
- env->fprs = tmp;
- break;
- case 85:
- env->y = tmp;
- break;
- default:
- return 0;
- }
- }
- return 8;
-#endif
-}
-#elif defined (TARGET_ARM)
-
-/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
- whatever the target description contains. Due to a historical mishap
- the FPA registers appear in between core integer regs and the CPSR.
- We hack round this by giving the FPA regs zero size when talking to a
- newer gdb. */
-#define GDB_CORE_XML "arm-core.xml"
-
-static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n)
-{
- if (n < 16) {
- /* Core integer register. */
- GET_REG32(env->regs[n]);
- }
- if (n < 24) {
- /* FPA registers. */
- if (gdb_has_xml) {
- return 0;
- }
- memset(mem_buf, 0, 12);
- return 12;
- }
- switch (n) {
- case 24:
- /* FPA status register. */
- if (gdb_has_xml) {
- return 0;
- }
- GET_REG32(0);
- case 25:
- /* CPSR */
- GET_REG32(cpsr_read(env));
- }
- /* Unknown register. */
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n)
-{
- uint32_t tmp;
-
- tmp = ldl_p(mem_buf);
-
- /* Mask out low bit of PC to workaround gdb bugs. This will probably
- cause problems if we ever implement the Jazelle DBX extensions. */
- if (n == 15) {
- tmp &= ~1;
- }
+ int flag = 0;
- if (n < 16) {
- /* Core integer register. */
- env->regs[n] = tmp;
- return 4;
- }
- if (n < 24) { /* 16-23 */
- /* FPA registers (ignored). */
- if (gdb_has_xml) {
- return 0;
- }
- return 12;
- }
- switch (n) {
- case 24:
- /* FPA status register (ignored). */
- if (gdb_has_xml) {
- return 0;
- }
- return 4;
- case 25:
- /* CPSR */
- cpsr_write(env, tmp, 0xffffffff);
- return 4;
- }
- /* Unknown register. */
- return 0;
-}
-
-#elif defined (TARGET_M68K)
-
-#define GDB_CORE_XML "cf-core.xml"
-
-static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n)
-{
- if (n < 8) {
- /* D0-D7 */
- GET_REG32(env->dregs[n]);
- } else if (n < 16) {
- /* A0-A7 */
- GET_REG32(env->aregs[n - 8]);
- } else {
- switch (n) {
- case 16:
- GET_REG32(env->sr);
- case 17:
- GET_REG32(env->pc);
- }
- }
- /* FP registers not included here because they vary between
- ColdFire and m68k. Use XML bits for these. */
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUM68KState *env, uint8_t *mem_buf, int n)
-{
- uint32_t tmp;
-
- tmp = ldl_p(mem_buf);
-
- if (n < 8) {
- /* D0-D7 */
- env->dregs[n] = tmp;
- } else if (n < 16) {
- /* A0-A7 */
- env->aregs[n - 8] = tmp;
- } else {
- switch (n) {
- case 16:
- env->sr = tmp;
- break;
- case 17:
- env->pc = tmp;
- break;
- default:
- return 0;
- }
- }
- return 4;
-}
-#elif defined (TARGET_MIPS)
-
-static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
-{
- if (n < 32) {
- GET_REGL(env->active_tc.gpr[n]);
- }
- if (env->CP0_Config1 & (1 << CP0C1_FP)) {
- if (n >= 38 && n < 70) {
- if (env->CP0_Status & (1 << CP0St_FR)) {
- GET_REGL(env->active_fpu.fpr[n - 38].d);
- } else {
- GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
- }
- }
- switch (n) {
- case 70:
- GET_REGL((int32_t)env->active_fpu.fcr31);
- case 71:
- GET_REGL((int32_t)env->active_fpu.fcr0);
- }
- }
- switch (n) {
- case 32:
- GET_REGL((int32_t)env->CP0_Status);
- case 33:
- GET_REGL(env->active_tc.LO[0]);
- case 34:
- GET_REGL(env->active_tc.HI[0]);
- case 35:
- GET_REGL(env->CP0_BadVAddr);
- case 36:
- GET_REGL((int32_t)env->CP0_Cause);
- case 37:
- GET_REGL(env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16));
- case 72:
- GET_REGL(0); /* fp */
- case 89:
- GET_REGL((int32_t)env->CP0_PRid);
- }
- if (n >= 73 && n <= 88) {
- /* 16 embedded regs. */
- GET_REGL(0);
- }
-
- return 0;
-}
-
-/* convert MIPS rounding mode in FCR31 to IEEE library */
-static unsigned int ieee_rm[] = {
- float_round_nearest_even,
- float_round_to_zero,
- float_round_up,
- float_round_down
-};
-#define RESTORE_ROUNDING_MODE \
- set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], \
- &env->active_fpu.fp_status)
-
-static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
-{
- target_ulong tmp;
-
- tmp = ldtul_p(mem_buf);
-
- if (n < 32) {
- env->active_tc.gpr[n] = tmp;
- return sizeof(target_ulong);
- }
- if (env->CP0_Config1 & (1 << CP0C1_FP)
- && n >= 38 && n < 73) {
- if (n < 70) {
- if (env->CP0_Status & (1 << CP0St_FR)) {
- env->active_fpu.fpr[n - 38].d = tmp;
- } else {
- env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
- }
- }
- switch (n) {
- case 70:
- env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
- /* set rounding mode */
- RESTORE_ROUNDING_MODE;
- break;
- case 71:
- env->active_fpu.fcr0 = tmp;
- break;
- }
- return sizeof(target_ulong);
- }
- switch (n) {
- case 32:
- env->CP0_Status = tmp;
- break;
- case 33:
- env->active_tc.LO[0] = tmp;
- break;
- case 34:
- env->active_tc.HI[0] = tmp;
- break;
- case 35:
- env->CP0_BadVAddr = tmp;
- break;
- case 36:
- env->CP0_Cause = tmp;
- break;
- case 37:
- env->active_tc.PC = tmp & ~(target_ulong)1;
- if (tmp & 1) {
- env->hflags |= MIPS_HFLAG_M16;
- } else {
- env->hflags &= ~(MIPS_HFLAG_M16);
- }
- break;
- case 72: /* fp, ignored */
- break;
- default:
- if (n > 89) {
+ if (!runstate_needs_reset()) {
+ if (vm_prepare_start()) {
return 0;
}
- /* Other registers are readonly. Ignore writes. */
- break;
- }
-
- return sizeof(target_ulong);
-}
-#elif defined(TARGET_OPENRISC)
-
-static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n)
-{
- if (n < 32) {
- GET_REG32(env->gpr[n]);
- } else {
- switch (n) {
- case 32: /* PPC */
- GET_REG32(env->ppc);
-
- case 33: /* NPC */
- GET_REG32(env->npc);
-
- case 34: /* SR */
- GET_REG32(env->sr);
-
- default:
- break;
- }
- }
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUOpenRISCState *env,
- uint8_t *mem_buf, int n)
-{
- OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
- CPUClass *cc = CPU_GET_CLASS(cpu);
- uint32_t tmp;
-
- if (n > cc->gdb_num_core_regs) {
- return 0;
- }
-
- tmp = ldl_p(mem_buf);
-
- if (n < 32) {
- env->gpr[n] = tmp;
- } else {
- switch (n) {
- case 32: /* PPC */
- env->ppc = tmp;
- break;
-
- case 33: /* NPC */
- env->npc = tmp;
- break;
-
- case 34: /* SR */
- env->sr = tmp;
- break;
-
- default:
- break;
- }
- }
- return 4;
-}
-#elif defined (TARGET_SH4)
-
-/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
-/* FIXME: We should use XML for this. */
-
-static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n)
-{
- switch (n) {
- case 0 ... 7:
- if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
- GET_REGL(env->gregs[n + 16]);
- } else {
- GET_REGL(env->gregs[n]);
- }
- case 8 ... 15:
- GET_REGL(env->gregs[n]);
- case 16:
- GET_REGL(env->pc);
- case 17:
- GET_REGL(env->pr);
- case 18:
- GET_REGL(env->gbr);
- case 19:
- GET_REGL(env->vbr);
- case 20:
- GET_REGL(env->mach);
- case 21:
- GET_REGL(env->macl);
- case 22:
- GET_REGL(env->sr);
- case 23:
- GET_REGL(env->fpul);
- case 24:
- GET_REGL(env->fpscr);
- case 25 ... 40:
- if (env->fpscr & FPSCR_FR) {
- stfl_p(mem_buf, env->fregs[n - 9]);
- } else {
- stfl_p(mem_buf, env->fregs[n - 25]);
- }
- return 4;
- case 41:
- GET_REGL(env->ssr);
- case 42:
- GET_REGL(env->spc);
- case 43 ... 50:
- GET_REGL(env->gregs[n - 43]);
- case 51 ... 58:
- GET_REGL(env->gregs[n - (51 - 16)]);
- }
-
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n)
-{
- switch (n) {
- case 0 ... 7:
- if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
- env->gregs[n + 16] = ldl_p(mem_buf);
- } else {
- env->gregs[n] = ldl_p(mem_buf);
- }
- break;
- case 8 ... 15:
- env->gregs[n] = ldl_p(mem_buf);
- break;
- case 16:
- env->pc = ldl_p(mem_buf);
- break;
- case 17:
- env->pr = ldl_p(mem_buf);
- break;
- case 18:
- env->gbr = ldl_p(mem_buf);
- break;
- case 19:
- env->vbr = ldl_p(mem_buf);
- break;
- case 20:
- env->mach = ldl_p(mem_buf);
- break;
- case 21:
- env->macl = ldl_p(mem_buf);
- break;
- case 22:
- env->sr = ldl_p(mem_buf);
- break;
- case 23:
- env->fpul = ldl_p(mem_buf);
- break;
- case 24:
- env->fpscr = ldl_p(mem_buf);
- break;
- case 25 ... 40:
- if (env->fpscr & FPSCR_FR) {
- env->fregs[n - 9] = ldfl_p(mem_buf);
- } else {
- env->fregs[n - 25] = ldfl_p(mem_buf);
- }
- break;
- case 41:
- env->ssr = ldl_p(mem_buf);
- break;
- case 42:
- env->spc = ldl_p(mem_buf);
- break;
- case 43 ... 50:
- env->gregs[n - 43] = ldl_p(mem_buf);
- break;
- case 51 ... 58:
- env->gregs[n - (51 - 16)] = ldl_p(mem_buf);
- break;
- default:
- return 0;
- }
-
- return 4;
-}
-#elif defined (TARGET_MICROBLAZE)
-
-static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n)
-{
- if (n < 32) {
- GET_REG32(env->regs[n]);
- } else {
- GET_REG32(env->sregs[n - 32]);
- }
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUMBState *env, uint8_t *mem_buf, int n)
-{
- MicroBlazeCPU *cpu = mb_env_get_cpu(env);
- CPUClass *cc = CPU_GET_CLASS(cpu);
- uint32_t tmp;
-
- if (n > cc->gdb_num_core_regs) {
- return 0;
- }
-
- tmp = ldl_p(mem_buf);
-
- if (n < 32) {
- env->regs[n] = tmp;
- } else {
- env->sregs[n - 32] = tmp;
- }
- return 4;
-}
-#elif defined (TARGET_CRIS)
-
-static int
-read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n)
-{
- if (n < 15) {
- GET_REG32(env->regs[n]);
- }
-
- if (n == 15) {
- GET_REG32(env->pc);
- }
-
- if (n < 32) {
- switch (n) {
- case 16:
- GET_REG8(env->pregs[n - 16]);
- case 17:
- GET_REG8(env->pregs[n - 16]);
- case 20:
- case 21:
- GET_REG16(env->pregs[n - 16]);
- default:
- if (n >= 23) {
- GET_REG32(env->pregs[n - 16]);
- }
- break;
- }
- }
- return 0;
-}
-
-static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n)
-{
- uint8_t srs;
-
- if (env->pregs[PR_VR] < 32) {
- return read_register_crisv10(env, mem_buf, n);
- }
-
- srs = env->pregs[PR_SRS];
- if (n < 16) {
- GET_REG32(env->regs[n]);
- }
-
- if (n >= 21 && n < 32) {
- GET_REG32(env->pregs[n - 16]);
- }
- if (n >= 33 && n < 49) {
- GET_REG32(env->sregs[srs][n - 33]);
- }
- switch (n) {
- case 16:
- GET_REG8(env->pregs[0]);
- case 17:
- GET_REG8(env->pregs[1]);
- case 18:
- GET_REG32(env->pregs[2]);
- case 19:
- GET_REG8(srs);
- case 20:
- GET_REG16(env->pregs[4]);
- case 32:
- GET_REG32(env->pc);
- }
-
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUCRISState *env, uint8_t *mem_buf, int n)
-{
- uint32_t tmp;
-
- if (n > 49) {
- return 0;
- }
-
- tmp = ldl_p(mem_buf);
-
- if (n < 16) {
- env->regs[n] = tmp;
- }
-
- if (n >= 21 && n < 32) {
- env->pregs[n - 16] = tmp;
- }
-
- /* FIXME: Should support function regs be writable? */
- switch (n) {
- case 16:
- return 1;
- case 17:
- return 1;
- case 18:
- env->pregs[PR_PID] = tmp;
- break;
- case 19:
- return 1;
- case 20:
- return 2;
- case 32:
- env->pc = tmp;
- break;
- }
-
- return 4;
-}
-#elif defined (TARGET_ALPHA)
-
-static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
-{
- uint64_t val;
- CPU_DoubleU d;
-
- switch (n) {
- case 0 ... 30:
- val = env->ir[n];
- break;
- case 32 ... 62:
- d.d = env->fir[n - 32];
- val = d.ll;
- break;
- case 63:
- val = cpu_alpha_load_fpcr(env);
- break;
- case 64:
- val = env->pc;
- break;
- case 66:
- val = env->unique;
- break;
- case 31:
- case 65:
- /* 31 really is the zero register; 65 is unassigned in the
- gdb protocol, but is still required to occupy 8 bytes. */
- val = 0;
- break;
- default:
- return 0;
- }
- GET_REGL(val);
-}
-
-static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n)
-{
- target_ulong tmp = ldtul_p(mem_buf);
- CPU_DoubleU d;
-
- switch (n) {
- case 0 ... 30:
- env->ir[n] = tmp;
- break;
- case 32 ... 62:
- d.ll = tmp;
- env->fir[n - 32] = d.d;
- break;
- case 63:
- cpu_alpha_store_fpcr(env, tmp);
- break;
- case 64:
- env->pc = tmp;
- break;
- case 66:
- env->unique = tmp;
- break;
- case 31:
- case 65:
- /* 31 really is the zero register; 65 is unassigned in the
- gdb protocol, but is still required to occupy 8 bytes. */
- break;
- default:
- return 0;
- }
- return 8;
-}
-#elif defined (TARGET_S390X)
-
-static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n)
-{
- uint64_t val;
- int cc_op;
-
- switch (n) {
- case S390_PSWM_REGNUM:
- cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr);
- val = deposit64(env->psw.mask, 44, 2, cc_op);
- GET_REGL(val);
- case S390_PSWA_REGNUM:
- GET_REGL(env->psw.addr);
- case S390_R0_REGNUM ... S390_R15_REGNUM:
- GET_REGL(env->regs[n-S390_R0_REGNUM]);
- case S390_A0_REGNUM ... S390_A15_REGNUM:
- GET_REG32(env->aregs[n-S390_A0_REGNUM]);
- case S390_FPC_REGNUM:
- GET_REG32(env->fpc);
- case S390_F0_REGNUM ... S390_F15_REGNUM:
- GET_REG64(env->fregs[n-S390_F0_REGNUM].ll);
- }
-
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUS390XState *env, uint8_t *mem_buf, int n)
-{
- target_ulong tmpl;
- uint32_t tmp32;
- int r = 8;
- tmpl = ldtul_p(mem_buf);
- tmp32 = ldl_p(mem_buf);
-
- switch (n) {
- case S390_PSWM_REGNUM:
- env->psw.mask = tmpl;
- env->cc_op = extract64(tmpl, 44, 2);
- break;
- case S390_PSWA_REGNUM:
- env->psw.addr = tmpl;
- break;
- case S390_R0_REGNUM ... S390_R15_REGNUM:
- env->regs[n-S390_R0_REGNUM] = tmpl;
- break;
- case S390_A0_REGNUM ... S390_A15_REGNUM:
- env->aregs[n-S390_A0_REGNUM] = tmp32;
- r = 4;
- break;
- case S390_FPC_REGNUM:
- env->fpc = tmp32;
- r = 4;
- break;
- case S390_F0_REGNUM ... S390_F15_REGNUM:
- env->fregs[n-S390_F0_REGNUM].ll = tmpl;
- break;
- default:
- return 0;
- }
- return r;
-}
-#elif defined (TARGET_LM32)
-
-#include "hw/lm32/lm32_pic.h"
-
-static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n)
-{
- if (n < 32) {
- GET_REG32(env->regs[n]);
- } else {
- switch (n) {
- case 32:
- GET_REG32(env->pc);
- /* FIXME: put in right exception ID */
- case 33:
- GET_REG32(0);
- case 34:
- GET_REG32(env->eba);
- case 35:
- GET_REG32(env->deba);
- case 36:
- GET_REG32(env->ie);
- case 37:
- GET_REG32(lm32_pic_get_im(env->pic_state));
- case 38:
- GET_REG32(lm32_pic_get_ip(env->pic_state));
- }
- }
- return 0;
-}
-
-static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n)
-{
- LM32CPU *cpu = lm32_env_get_cpu(env);
- CPUClass *cc = CPU_GET_CLASS(cpu);
- uint32_t tmp;
- if (n > cc->gdb_num_core_regs) {
- return 0;
- }
-
- tmp = ldl_p(mem_buf);
-
- if (n < 32) {
- env->regs[n] = tmp;
- } else {
- switch (n) {
- case 32:
- env->pc = tmp;
- break;
- case 34:
- env->eba = tmp;
- break;
- case 35:
- env->deba = tmp;
- break;
- case 36:
- env->ie = tmp;
- break;
- case 37:
- lm32_pic_set_im(env->pic_state, tmp);
- break;
- case 38:
- lm32_pic_set_ip(env->pic_state, tmp);
- break;
+ CPU_FOREACH(cpu) {
+ switch (newstates[cpu->cpu_index]) {
+ case 0:
+ case 1:
+ break; /* nothing to do here */
+ case 's':
+ cpu_single_step(cpu, sstep_flags);
+ cpu_resume(cpu);
+ flag = 1;
+ break;
+ case 'c':
+ cpu_resume(cpu);
+ flag = 1;
+ break;
+ default:
+ res = -1;
+ break;
+ }
}
}
- return 4;
+ if (flag) {
+ qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true);
+ }
+#endif
+ return res;
}
-#elif defined(TARGET_XTENSA)
-static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
+static void put_buffer(GDBState *s, const uint8_t *buf, int len)
{
- const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
+#ifdef CONFIG_USER_ONLY
+ int ret;
- if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
- return 0;
+ while (len > 0) {
+ ret = send(s->fd, buf, len, 0);
+ if (ret < 0) {
+ if (errno != EINTR)
+ return;
+ } else {
+ buf += ret;
+ len -= ret;
+ }
}
+#else
+ /* XXX this blocks entire thread. Rewrite to use
+ * qemu_chr_fe_write and background I/O callbacks */
+ qemu_chr_fe_write_all(&s->chr, buf, len);
+#endif
+}
- switch (reg->type) {
- case 9: /*pc*/
- GET_REG32(env->pc);
-
- case 1: /*ar*/
- xtensa_sync_phys_from_window(env);
- GET_REG32(env->phys_regs[(reg->targno & 0xff) % env->config->nareg]);
-
- case 2: /*SR*/
- GET_REG32(env->sregs[reg->targno & 0xff]);
-
- case 3: /*UR*/
- GET_REG32(env->uregs[reg->targno & 0xff]);
-
- case 4: /*f*/
- GET_REG32(float32_val(env->fregs[reg->targno & 0x0f]));
-
- case 8: /*a*/
- GET_REG32(env->regs[reg->targno & 0x0f]);
-
- default:
- qemu_log("%s from reg %d of unsupported type %d\n",
- __func__, n, reg->type);
+static inline int fromhex(int v)
+{
+ if (v >= '0' && v <= '9')
+ return v - '0';
+ else if (v >= 'A' && v <= 'F')
+ return v - 'A' + 10;
+ else if (v >= 'a' && v <= 'f')
+ return v - 'a' + 10;
+ else
return 0;
- }
}
-static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n)
+static inline int tohex(int v)
{
- uint32_t tmp;
- const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
+ if (v < 10)
+ return v + '0';
+ else
+ return v - 10 + 'a';
+}
- if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
- return 0;
+static void memtohex(char *buf, const uint8_t *mem, int len)
+{
+ int i, c;
+ char *q;
+ q = buf;
+ for(i = 0; i < len; i++) {
+ c = mem[i];
+ *q++ = tohex(c >> 4);
+ *q++ = tohex(c & 0xf);
}
+ *q = '\0';
+}
- tmp = ldl_p(mem_buf);
-
- switch (reg->type) {
- case 9: /*pc*/
- env->pc = tmp;
- break;
+static void hextomem(uint8_t *mem, const char *buf, int len)
+{
+ int i;
- case 1: /*ar*/
- env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp;
- xtensa_sync_window_from_phys(env);
- break;
+ for(i = 0; i < len; i++) {
+ mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
+ buf += 2;
+ }
+}
- case 2: /*SR*/
- env->sregs[reg->targno & 0xff] = tmp;
- break;
+/* return -1 if error, 0 if OK */
+static int put_packet_binary(GDBState *s, const char *buf, int len)
+{
+ int csum, i;
+ uint8_t *p;
- case 3: /*UR*/
- env->uregs[reg->targno & 0xff] = tmp;
- break;
+ for(;;) {
+ p = s->last_packet;
+ *(p++) = '$';
+ memcpy(p, buf, len);
+ p += len;
+ csum = 0;
+ for(i = 0; i < len; i++) {
+ csum += buf[i];
+ }
+ *(p++) = '#';
+ *(p++) = tohex((csum >> 4) & 0xf);
+ *(p++) = tohex((csum) & 0xf);
- case 4: /*f*/
- env->fregs[reg->targno & 0x0f] = make_float32(tmp);
- break;
+ s->last_packet_len = p - s->last_packet;
+ put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
- case 8: /*a*/
- env->regs[reg->targno & 0x0f] = tmp;
+#ifdef CONFIG_USER_ONLY
+ i = get_char(s);
+ if (i < 0)
+ return -1;
+ if (i == '+')
+ break;
+#else
break;
-
- default:
- qemu_log("%s to reg %d of unsupported type %d\n",
- __func__, n, reg->type);
- return 0;
+#endif
}
-
- return 4;
-}
-#else
-
-static int cpu_gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int n)
-{
return 0;
}
-static int cpu_gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int n)
+/* return -1 if error, 0 if OK */
+static int put_packet(GDBState *s, const char *buf)
{
- return 0;
-}
-
+#ifdef DEBUG_GDB
+ printf("reply='%s'\n", buf);
#endif
-#ifdef GDB_CORE_XML
+ return put_packet_binary(s, buf, strlen(buf));
+}
+
/* Encode data using the encoding for 'x' packets. */
static int memtox(char *buf, const char *mem, int len)
{
return p - buf;
}
-static const char *get_feature_xml(const char *p, const char **newp)
+static const char *get_feature_xml(const char *p, const char **newp,
+ CPUClass *cc)
{
size_t len;
int i;
GDBRegisterState *r;
CPUState *cpu = first_cpu;
- snprintf(target_xml, sizeof(target_xml),
- "<?xml version=\"1.0\"?>"
- "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
- "<target>"
- "<xi:include href=\"%s\"/>",
- GDB_CORE_XML);
-
+ pstrcat(target_xml, sizeof(target_xml),
+ "<?xml version=\"1.0\"?>"
+ "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
+ "<target>");
+ if (cc->gdb_arch_name) {
+ gchar *arch = cc->gdb_arch_name(cpu);
+ pstrcat(target_xml, sizeof(target_xml), "<architecture>");
+ pstrcat(target_xml, sizeof(target_xml), arch);
+ pstrcat(target_xml, sizeof(target_xml), "</architecture>");
+ g_free(arch);
+ }
+ pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
+ pstrcat(target_xml, sizeof(target_xml), cc->gdb_core_xml_file);
+ pstrcat(target_xml, sizeof(target_xml), "\"/>");
for (r = cpu->gdb_regs; r; r = r->next) {
pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
pstrcat(target_xml, sizeof(target_xml), r->xml);
}
return name ? xml_builtin[i][1] : NULL;
}
-#endif
static int gdb_read_register(CPUState *cpu, uint8_t *mem_buf, int reg)
{
GDBRegisterState *r;
if (reg < cc->gdb_num_core_regs) {
- return cpu_gdb_read_register(env, mem_buf, reg);
+ return cc->gdb_read_register(cpu, mem_buf, reg);
}
for (r = cpu->gdb_regs; r; r = r->next) {
GDBRegisterState *r;
if (reg < cc->gdb_num_core_regs) {
- return cpu_gdb_write_register(env, mem_buf, reg);
+ return cc->gdb_write_register(cpu, mem_buf, reg);
}
for (r = cpu->gdb_regs; r; r = r->next) {
*p = s;
if (g_pos) {
if (g_pos != s->base_reg) {
- fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
- "Expected %d got %d\n", xml, g_pos, s->base_reg);
+ error_report("Error: Bad gdb register numbering for '%s', "
+ "expected %d got %d", xml, g_pos, s->base_reg);
+ } else {
+ cpu->gdb_num_g_regs = cpu->gdb_num_regs;
}
}
}
#ifndef CONFIG_USER_ONLY
-static const int xlat_gdb_type[] = {
- [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE,
- [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ,
- [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
-};
+/* Translate GDB watchpoint type to a flags value for cpu_watchpoint_* */
+static inline int xlat_gdb_type(CPUState *cpu, int gdbtype)
+{
+ static const int xlat[] = {
+ [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE,
+ [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ,
+ [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
+ };
+
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+ int cputype = xlat[gdbtype];
+
+ if (cc->gdb_stop_before_watchpoint) {
+ cputype |= BP_STOP_BEFORE_ACCESS;
+ }
+ return cputype;
+}
#endif
static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
{
CPUState *cpu;
- CPUArchState *env;
int err = 0;
if (kvm_enabled()) {
switch (type) {
case GDB_BREAKPOINT_SW:
case GDB_BREAKPOINT_HW:
- for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
- env = cpu->env_ptr;
- err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
- if (err)
+ CPU_FOREACH(cpu) {
+ err = cpu_breakpoint_insert(cpu, addr, BP_GDB, NULL);
+ if (err) {
break;
+ }
}
return err;
#ifndef CONFIG_USER_ONLY
case GDB_WATCHPOINT_WRITE:
case GDB_WATCHPOINT_READ:
case GDB_WATCHPOINT_ACCESS:
- for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
- env = cpu->env_ptr;
- err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
- NULL);
- if (err)
+ CPU_FOREACH(cpu) {
+ err = cpu_watchpoint_insert(cpu, addr, len,
+ xlat_gdb_type(cpu, type), NULL);
+ if (err) {
break;
+ }
}
return err;
#endif
static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
{
CPUState *cpu;
- CPUArchState *env;
int err = 0;
if (kvm_enabled()) {
switch (type) {
case GDB_BREAKPOINT_SW:
case GDB_BREAKPOINT_HW:
- for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
- env = cpu->env_ptr;
- err = cpu_breakpoint_remove(env, addr, BP_GDB);
- if (err)
+ CPU_FOREACH(cpu) {
+ err = cpu_breakpoint_remove(cpu, addr, BP_GDB);
+ if (err) {
break;
+ }
}
return err;
#ifndef CONFIG_USER_ONLY
case GDB_WATCHPOINT_WRITE:
case GDB_WATCHPOINT_READ:
case GDB_WATCHPOINT_ACCESS:
- for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
- env = cpu->env_ptr;
- err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
+ CPU_FOREACH(cpu) {
+ err = cpu_watchpoint_remove(cpu, addr, len,
+ xlat_gdb_type(cpu, type));
if (err)
break;
}
static void gdb_breakpoint_remove_all(void)
{
CPUState *cpu;
- CPUArchState *env;
if (kvm_enabled()) {
kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
return;
}
- for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
- env = cpu->env_ptr;
- cpu_breakpoint_remove_all(env, BP_GDB);
+ CPU_FOREACH(cpu) {
+ cpu_breakpoint_remove_all(cpu, BP_GDB);
#ifndef CONFIG_USER_ONLY
- cpu_watchpoint_remove_all(env, BP_GDB);
+ cpu_watchpoint_remove_all(cpu, BP_GDB);
#endif
}
}
static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
{
CPUState *cpu = s->c_cpu;
- CPUClass *cc = CPU_GET_CLASS(cpu);
cpu_synchronize_state(cpu);
- if (cc->set_pc) {
- cc->set_pc(cpu, pc);
- }
+ cpu_set_pc(cpu, pc);
}
static CPUState *find_cpu(uint32_t thread_id)
{
CPUState *cpu;
- for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
+ CPU_FOREACH(cpu) {
if (cpu_index(cpu) == thread_id) {
return cpu;
}
return NULL;
}
+static int is_query_packet(const char *p, const char *query, char separator)
+{
+ unsigned int query_len = strlen(query);
+
+ return strncmp(p, query, query_len) == 0 &&
+ (p[query_len] == '\0' || p[query_len] == separator);
+}
+
+/**
+ * gdb_handle_vcont - Parses and handles a vCont packet.
+ * returns -ENOTSUP if a command is unsupported, -EINVAL or -ERANGE if there is
+ * a format error, 0 on success.
+ */
+static int gdb_handle_vcont(GDBState *s, const char *p)
+{
+ int res, idx, signal = 0;
+ char cur_action;
+ char *newstates;
+ unsigned long tmp;
+ CPUState *cpu;
+#ifdef CONFIG_USER_ONLY
+ int max_cpus = 1; /* global variable max_cpus exists only in system mode */
+
+ CPU_FOREACH(cpu) {
+ max_cpus = max_cpus <= cpu->cpu_index ? cpu->cpu_index + 1 : max_cpus;
+ }
+#endif
+ /* uninitialised CPUs stay 0 */
+ newstates = g_new0(char, max_cpus);
+
+ /* mark valid CPUs with 1 */
+ CPU_FOREACH(cpu) {
+ newstates[cpu->cpu_index] = 1;
+ }
+
+ /*
+ * res keeps track of what error we are returning, with -ENOTSUP meaning
+ * that the command is unknown or unsupported, thus returning an empty
+ * packet, while -EINVAL and -ERANGE cause an E22 packet, due to invalid,
+ * or incorrect parameters passed.
+ */
+ res = 0;
+ while (*p) {
+ if (*p++ != ';') {
+ res = -ENOTSUP;
+ goto out;
+ }
+
+ cur_action = *p++;
+ if (cur_action == 'C' || cur_action == 'S') {
+ cur_action = tolower(cur_action);
+ res = qemu_strtoul(p + 1, &p, 16, &tmp);
+ if (res) {
+ goto out;
+ }
+ signal = gdb_signal_to_target(tmp);
+ } else if (cur_action != 'c' && cur_action != 's') {
+ /* unknown/invalid/unsupported command */
+ res = -ENOTSUP;
+ goto out;
+ }
+ /* thread specification. special values: (none), -1 = all; 0 = any */
+ if ((p[0] == ':' && p[1] == '-' && p[2] == '1') || (p[0] != ':')) {
+ if (*p == ':') {
+ p += 3;
+ }
+ for (idx = 0; idx < max_cpus; idx++) {
+ if (newstates[idx] == 1) {
+ newstates[idx] = cur_action;
+ }
+ }
+ } else if (*p == ':') {
+ p++;
+ res = qemu_strtoul(p, &p, 16, &tmp);
+ if (res) {
+ goto out;
+ }
+ idx = tmp;
+ /* 0 means any thread, so we pick the first valid CPU */
+ if (!idx) {
+ idx = cpu_index(first_cpu);
+ }
+
+ /*
+ * If we are in user mode, the thread specified is actually a
+ * thread id, and not an index. We need to find the actual
+ * CPU first, and only then we can use its index.
+ */
+ cpu = find_cpu(idx);
+ /* invalid CPU/thread specified */
+ if (!idx || !cpu) {
+ res = -EINVAL;
+ goto out;
+ }
+ /* only use if no previous match occourred */
+ if (newstates[cpu->cpu_index] == 1) {
+ newstates[cpu->cpu_index] = cur_action;
+ }
+ }
+ }
+ s->signal = signal;
+ gdb_continue_partial(s, newstates);
+
+out:
+ g_free(newstates);
+
+ return res;
+}
+
static int gdb_handle_packet(GDBState *s, const char *line_buf)
{
CPUState *cpu;
+ CPUClass *cc;
const char *p;
uint32_t thread;
int ch, reg_size, type, res;
return RS_IDLE;
case 'v':
if (strncmp(p, "Cont", 4) == 0) {
- int res_signal, res_thread;
-
p += 4;
if (*p == '?') {
put_packet(s, "vCont;c;C;s;S");
break;
}
- res = 0;
- res_signal = 0;
- res_thread = 0;
- while (*p) {
- int action, signal;
-
- if (*p++ != ';') {
- res = 0;
- break;
- }
- action = *p++;
- signal = 0;
- if (action == 'C' || action == 'S') {
- signal = strtoul(p, (char **)&p, 16);
- } else if (action != 'c' && action != 's') {
- res = 0;
- break;
- }
- thread = 0;
- if (*p == ':') {
- thread = strtoull(p+1, (char **)&p, 16);
- }
- action = tolower(action);
- if (res == 0 || (res == 'c' && action == 's')) {
- res = action;
- res_signal = signal;
- res_thread = thread;
- }
- }
+
+ res = gdb_handle_vcont(s, p);
+
if (res) {
- if (res_thread != -1 && res_thread != 0) {
- cpu = find_cpu(res_thread);
- if (cpu == NULL) {
- put_packet(s, "E22");
- break;
- }
- s->c_cpu = cpu;
- }
- if (res == 's') {
- cpu_single_step(s->c_cpu, sstep_flags);
+ if ((res == -EINVAL) || (res == -ERANGE)) {
+ put_packet(s, "E22");
+ break;
}
- s->signal = res_signal;
- gdb_continue(s);
- return RS_IDLE;
+ goto unknown_command;
}
break;
} else {
goto unknown_command;
}
case 'k':
-#ifdef CONFIG_USER_ONLY
/* Kill the target */
- fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
+ error_report("QEMU: Terminated via GDBstub");
exit(0);
-#endif
case 'D':
/* Detach packet */
gdb_breakpoint_remove_all();
case 'g':
cpu_synchronize_state(s->g_cpu);
len = 0;
- for (addr = 0; addr < s->g_cpu->gdb_num_regs; addr++) {
+ for (addr = 0; addr < s->g_cpu->gdb_num_g_regs; addr++) {
reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
len += reg_size;
}
registers = mem_buf;
len = strlen(p) / 2;
hextomem((uint8_t *)registers, p, len);
- for (addr = 0; addr < s->g_cpu->gdb_num_regs && len > 0; addr++) {
+ for (addr = 0; addr < s->g_cpu->gdb_num_g_regs && len > 0; addr++) {
reg_size = gdb_write_register(s->g_cpu, registers, addr);
len -= reg_size;
registers += reg_size;
if (*p == ',')
p++;
len = strtoull(p, NULL, 16);
+
+ /* memtohex() doubles the required space */
+ if (len > MAX_PACKET_LENGTH / 2) {
+ put_packet (s, "E22");
+ break;
+ }
+
if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, false) != 0) {
put_packet (s, "E14");
} else {
len = strtoull(p, (char **)&p, 16);
if (*p == ':')
p++;
+
+ /* hextomem() reads 2*len bytes */
+ if (len > strlen(p) / 2) {
+ put_packet (s, "E22");
+ break;
+ }
hextomem(mem_buf, p, len);
if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len,
true) != 0) {
SSTEP_NOTIMER);
put_packet(s, buf);
break;
- } else if (strncmp(p,"qemu.sstep",10) == 0) {
+ } else if (is_query_packet(p, "qemu.sstep", '=')) {
/* Display or change the sstep_flags */
p += 10;
if (*p != '=') {
if (s->query_cpu) {
snprintf(buf, sizeof(buf), "m%x", cpu_index(s->query_cpu));
put_packet(s, buf);
- s->query_cpu = s->query_cpu->next_cpu;
+ s->query_cpu = CPU_NEXT(s->query_cpu);
} else
put_packet(s, "l");
break;
cpu = find_cpu(thread);
if (cpu != NULL) {
cpu_synchronize_state(cpu);
- len = snprintf((char *)mem_buf, sizeof(mem_buf),
+ /* memtohex() doubles the required space */
+ len = snprintf((char *)mem_buf, sizeof(buf) / 2,
"CPU#%d [%s]", cpu->cpu_index,
cpu->halted ? "halted " : "running");
memtohex(buf, mem_buf, len);
break;
}
#ifdef CONFIG_USER_ONLY
- else if (strncmp(p, "Offsets", 7) == 0) {
- CPUArchState *env = s->c_cpu->env_ptr;
- TaskState *ts = env->opaque;
+ else if (strcmp(p, "Offsets") == 0) {
+ TaskState *ts = s->c_cpu->opaque;
snprintf(buf, sizeof(buf),
"Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
put_packet(s, "E01");
break;
}
- hextomem(mem_buf, p + 5, len);
len = len / 2;
+ hextomem(mem_buf, p + 5, len);
mem_buf[len++] = 0;
qemu_chr_be_write(s->mon_chr, mem_buf, len);
put_packet(s, "OK");
break;
}
#endif /* !CONFIG_USER_ONLY */
- if (strncmp(p, "Supported", 9) == 0) {
+ if (is_query_packet(p, "Supported", ':')) {
snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
-#ifdef GDB_CORE_XML
- pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
-#endif
+ cc = CPU_GET_CLASS(first_cpu);
+ if (cc->gdb_core_xml_file != NULL) {
+ pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
+ }
put_packet(s, buf);
break;
}
-#ifdef GDB_CORE_XML
if (strncmp(p, "Xfer:features:read:", 19) == 0) {
const char *xml;
target_ulong total_len;
- gdb_has_xml = 1;
+ cc = CPU_GET_CLASS(first_cpu);
+ if (cc->gdb_core_xml_file == NULL) {
+ goto unknown_command;
+ }
+
+ gdb_has_xml = true;
p += 19;
- xml = get_feature_xml(p, &p);
+ xml = get_feature_xml(p, &p, cc);
if (!xml) {
snprintf(buf, sizeof(buf), "E00");
put_packet(s, buf);
put_packet_binary(s, buf, len + 1);
break;
}
-#endif
+ if (is_query_packet(p, "Attached", ':')) {
+ put_packet(s, GDB_ATTACHED);
+ break;
+ }
/* Unrecognised 'q' command. */
goto unknown_command;
static void gdb_vm_state_change(void *opaque, int running, RunState state)
{
GDBState *s = gdbserver_state;
- CPUArchState *env = s->c_cpu->env_ptr;
CPUState *cpu = s->c_cpu;
char buf[256];
const char *type;
}
switch (state) {
case RUN_STATE_DEBUG:
- if (env->watchpoint_hit) {
- switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
+ if (cpu->watchpoint_hit) {
+ switch (cpu->watchpoint_hit->flags & BP_MEM_ACCESS) {
case BP_MEM_READ:
type = "r";
break;
snprintf(buf, sizeof(buf),
"T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
GDB_SIGNAL_TRAP, cpu_index(cpu), type,
- env->watchpoint_hit->vaddr);
- env->watchpoint_hit = NULL;
+ (target_ulong)cpu->watchpoint_hit->vaddr);
+ cpu->watchpoint_hit = NULL;
goto send_packet;
}
- tb_flush(env);
+ tb_flush(cpu);
ret = GDB_SIGNAL_TRAP;
break;
case RUN_STATE_PAUSED:
ret = GDB_SIGNAL_UNKNOWN;
break;
}
+ gdb_set_stop_cpu(cpu);
snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, cpu_index(cpu));
send_packet:
%x - target_ulong argument printed in hex.
%lx - 64-bit argument printed in hex.
%s - string pointer (target_ulong) and length (int) pair. */
-void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
+void gdb_do_syscallv(gdb_syscall_complete_cb cb, const char *fmt, va_list va)
{
- va_list va;
char *p;
char *p_end;
target_ulong addr;
#ifndef CONFIG_USER_ONLY
vm_stop(RUN_STATE_DEBUG);
#endif
- va_start(va, fmt);
p = s->syscall_buf;
p_end = &s->syscall_buf[sizeof(s->syscall_buf)];
*(p++) = 'F';
break;
default:
bad_format:
- fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
- fmt - 1);
+ error_report("gdbstub: Bad syscall format string '%s'",
+ fmt - 1);
break;
}
} else {
}
}
*p = 0;
- va_end(va);
#ifdef CONFIG_USER_ONLY
put_packet(s, s->syscall_buf);
gdb_handlesig(s->c_cpu, 0);
is still in the running state, which can cause packets to be dropped
and state transition 'T' packets to be sent while the syscall is still
being processed. */
- cpu_exit(s->c_cpu);
+ qemu_cpu_kick(s->c_cpu);
#endif
}
+void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
+{
+ va_list va;
+
+ va_start(va, fmt);
+ gdb_do_syscallv(cb, fmt, va);
+ va_end(va);
+}
+
static void gdb_read_byte(GDBState *s, int ch)
{
int i, csum;
{
GDBState *s;
char buf[4];
+#ifndef CONFIG_USER_ONLY
+ Chardev *chr;
+#endif
s = gdbserver_state;
if (!s) {
if (gdbserver_fd < 0 || s->fd < 0) {
return;
}
+#else
+ chr = qemu_chr_fe_get_driver(&s->chr);
+ if (!chr) {
+ return;
+ }
#endif
snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
put_packet(s, buf);
#ifndef CONFIG_USER_ONLY
- if (s->chr) {
- qemu_chr_delete(s->chr);
- }
+ qemu_chr_fe_deinit(&s->chr);
+ qemu_chr_delete(chr);
#endif
}
#ifdef CONFIG_USER_ONLY
-int
-gdb_queuesig (void)
-{
- GDBState *s;
-
- s = gdbserver_state;
-
- if (gdbserver_fd < 0 || s->fd < 0)
- return 0;
- else
- return 1;
-}
-
int
gdb_handlesig(CPUState *cpu, int sig)
{
- CPUArchState *env = cpu->env_ptr;
GDBState *s;
char buf[256];
int n;
/* disable single step if it was enabled */
cpu_single_step(cpu, 0);
- tb_flush(env);
+ tb_flush(cpu);
if (sig != 0) {
snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
for (i = 0; i < n; i++) {
gdb_read_byte(s, buf[i]);
}
- } else if (n == 0 || errno != EAGAIN) {
+ } else {
/* XXX: Connection closed. Should probably wait for another
connection before continuing. */
+ if (n == 0) {
+ close(s->fd);
+ }
+ s->fd = -1;
return sig;
}
}
s->c_cpu = first_cpu;
s->g_cpu = first_cpu;
s->fd = fd;
- gdb_has_xml = 0;
+ gdb_has_xml = false;
gdbserver_state = s;
-
- fcntl(fd, F_SETFL, O_NONBLOCK);
}
static int gdbserver_open(int port)
{
struct sockaddr_in sockaddr;
- int fd, val, ret;
+ int fd, ret;
fd = socket(PF_INET, SOCK_STREAM, 0);
if (fd < 0) {
fcntl(fd, F_SETFD, FD_CLOEXEC);
#endif
- /* allow fast reuse */
- val = 1;
- qemu_setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val));
+ socket_set_fast_reuse(fd);
sockaddr.sin_family = AF_INET;
sockaddr.sin_port = htons(port);
close(fd);
return -1;
}
- ret = listen(fd, 0);
+ ret = listen(fd, 1);
if (ret < 0) {
perror("listen");
close(fd);
}
/* Disable gdb stub for child processes. */
-void gdbserver_fork(CPUArchState *env)
+void gdbserver_fork(CPUState *cpu)
{
GDBState *s = gdbserver_state;
- if (gdbserver_fd < 0 || s->fd < 0)
- return;
+
+ if (gdbserver_fd < 0 || s->fd < 0) {
+ return;
+ }
close(s->fd);
s->fd = -1;
- cpu_breakpoint_remove_all(env, BP_GDB);
- cpu_watchpoint_remove_all(env, BP_GDB);
+ cpu_breakpoint_remove_all(cpu, BP_GDB);
+ cpu_watchpoint_remove_all(cpu, BP_GDB);
}
#else
static int gdb_chr_can_receive(void *opaque)
switch (event) {
case CHR_EVENT_OPENED:
vm_stop(RUN_STATE_PAUSED);
- gdb_has_xml = 0;
+ gdb_has_xml = false;
break;
default:
break;
put_packet(s, buf);
}
-static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len)
+static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len)
{
const char *p = (const char *)buf;
int max_sz;
}
#endif
+static void gdb_monitor_open(Chardev *chr, ChardevBackend *backend,
+ bool *be_opened, Error **errp)
+{
+ *be_opened = false;
+}
+
+static void char_gdb_class_init(ObjectClass *oc, void *data)
+{
+ ChardevClass *cc = CHARDEV_CLASS(oc);
+
+ cc->internal = true;
+ cc->open = gdb_monitor_open;
+ cc->chr_write = gdb_monitor_write;
+}
+
+#define TYPE_CHARDEV_GDB "chardev-gdb"
+
+static const TypeInfo char_gdb_type_info = {
+ .name = TYPE_CHARDEV_GDB,
+ .parent = TYPE_CHARDEV,
+ .class_init = char_gdb_class_init,
+};
+
int gdbserver_start(const char *device)
{
GDBState *s;
char gdbstub_device_name[128];
- CharDriverState *chr = NULL;
- CharDriverState *mon_chr;
+ Chardev *chr = NULL;
+ Chardev *mon_chr;
+
+ if (!first_cpu) {
+ error_report("gdbstub: meaningless to attach gdb to a "
+ "machine without any CPU.");
+ return -1;
+ }
if (!device)
return -1;
sigaction(SIGINT, &act, NULL);
}
#endif
- chr = qemu_chr_new("gdb", device, NULL);
+ chr = qemu_chr_new_noreplay("gdb", device);
if (!chr)
return -1;
-
- qemu_chr_fe_claim_no_fail(chr);
- qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
- gdb_chr_event, NULL);
}
s = gdbserver_state;
qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
/* Initialize a monitor terminal for gdb */
- mon_chr = g_malloc0(sizeof(*mon_chr));
- mon_chr->chr_write = gdb_monitor_write;
+ mon_chr = qemu_chardev_new(NULL, TYPE_CHARDEV_GDB,
+ NULL, &error_abort);
monitor_init(mon_chr, 0);
} else {
- if (s->chr)
- qemu_chr_delete(s->chr);
+ if (qemu_chr_fe_get_driver(&s->chr)) {
+ qemu_chr_delete(qemu_chr_fe_get_driver(&s->chr));
+ }
mon_chr = s->mon_chr;
memset(s, 0, sizeof(GDBState));
+ s->mon_chr = mon_chr;
}
s->c_cpu = first_cpu;
s->g_cpu = first_cpu;
- s->chr = chr;
+ if (chr) {
+ qemu_chr_fe_init(&s->chr, chr, &error_abort);
+ qemu_chr_fe_set_handlers(&s->chr, gdb_chr_can_receive, gdb_chr_receive,
+ gdb_chr_event, NULL, NULL, true);
+ }
s->state = chr ? RS_IDLE : RS_INACTIVE;
s->mon_chr = mon_chr;
s->current_syscall_cb = NULL;
return 0;
}
+
+static void register_types(void)
+{
+ type_register_static(&char_gdb_type_info);
+}
+
+type_init(register_types);
#endif
projects / mirror_qemu.git / blobdiff