}
for (i = 0; i < sc->num_cpus; i++) {
- object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
- sizeof(s->cpu[i]), sc->cpu_type,
- &error_abort, NULL);
+ object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type);
}
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
- sysbus_init_child_obj(obj, "scu", OBJECT(&s->scu), sizeof(s->scu),
- typename);
+ object_initialize_child(obj, "scu", &s->scu, typename);
qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev",
sc->silicon_rev);
object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu),
- "hw-strap1", &error_abort);
+ "hw-strap1");
object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu),
- "hw-strap2", &error_abort);
+ "hw-strap2");
object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu),
- "hw-prot-key", &error_abort);
+ "hw-prot-key");
- sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore,
- sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV);
+ object_initialize_child(obj, "a7mpcore", &s->a7mpcore,
+ TYPE_A15MPCORE_PRIV);
- sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc),
- TYPE_ASPEED_RTC);
+ object_initialize_child(obj, "rtc", &s->rtc, TYPE_ASPEED_RTC);
snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname);
- sysbus_init_child_obj(obj, "timerctrl", OBJECT(&s->timerctrl),
- sizeof(s->timerctrl), typename);
+ object_initialize_child(obj, "timerctrl", &s->timerctrl, typename);
snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname);
- sysbus_init_child_obj(obj, "i2c", OBJECT(&s->i2c), sizeof(s->i2c),
- typename);
+ object_initialize_child(obj, "i2c", &s->i2c, typename);
snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname);
- sysbus_init_child_obj(obj, "fmc", OBJECT(&s->fmc), sizeof(s->fmc),
- typename);
- object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs",
- &error_abort);
+ object_initialize_child(obj, "fmc", &s->fmc, typename);
+ object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs");
for (i = 0; i < sc->spis_num; i++) {
snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname);
- sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]),
- sizeof(s->spi[i]), typename);
+ object_initialize_child(obj, "spi[*]", &s->spi[i], typename);
}
for (i = 0; i < sc->ehcis_num; i++) {
- sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]),
- sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
+ object_initialize_child(obj, "ehci[*]", &s->ehci[i],
+ TYPE_PLATFORM_EHCI);
}
snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname);
- sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc),
- typename);
+ object_initialize_child(obj, "sdmc", &s->sdmc, typename);
object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc),
- "ram-size", &error_abort);
+ "ram-size");
object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc),
- "max-ram-size", &error_abort);
+ "max-ram-size");
for (i = 0; i < sc->wdts_num; i++) {
snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname);
- sysbus_init_child_obj(obj, "wdt[*]", OBJECT(&s->wdt[i]),
- sizeof(s->wdt[i]), typename);
+ object_initialize_child(obj, "wdt[*]", &s->wdt[i], typename);
}
for (i = 0; i < sc->macs_num; i++) {
- sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]),
- sizeof(s->ftgmac100[i]), TYPE_FTGMAC100);
+ object_initialize_child(obj, "ftgmac100[*]", &s->ftgmac100[i],
+ TYPE_FTGMAC100);
- sysbus_init_child_obj(obj, "mii[*]", &s->mii[i], sizeof(s->mii[i]),
- TYPE_ASPEED_MII);
+ object_initialize_child(obj, "mii[*]", &s->mii[i], TYPE_ASPEED_MII);
}
- sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma),
- TYPE_ASPEED_XDMA);
+ object_initialize_child(obj, "xdma", &s->xdma, TYPE_ASPEED_XDMA);
snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname);
- sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio),
- typename);
+ object_initialize_child(obj, "gpio", &s->gpio, typename);
snprintf(typename, sizeof(typename), "aspeed.gpio-%s-1_8v", socname);
- sysbus_init_child_obj(obj, "gpio_1_8v", OBJECT(&s->gpio_1_8v),
- sizeof(s->gpio_1_8v), typename);
+ object_initialize_child(obj, "gpio_1_8v", &s->gpio_1_8v, typename);
- sysbus_init_child_obj(obj, "sd-controller", OBJECT(&s->sdhci),
- sizeof(s->sdhci), TYPE_ASPEED_SDHCI);
+ object_initialize_child(obj, "sd-controller", &s->sdhci,
+ TYPE_ASPEED_SDHCI);
object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort);
/* Init sd card slot class here so that they're under the correct parent */
for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) {
- sysbus_init_child_obj(obj, "sd-controller.sdhci[*]",
- OBJECT(&s->sdhci.slots[i]),
- sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI);
+ object_initialize_child(obj, "sd-controller.sdhci[*]",
+ &s->sdhci.slots[i], TYPE_SYSBUS_SDHCI);
}
- sysbus_init_child_obj(obj, "emmc-controller", OBJECT(&s->emmc),
- sizeof(s->emmc), TYPE_ASPEED_SDHCI);
+ object_initialize_child(obj, "emmc-controller", &s->emmc,
+ TYPE_ASPEED_SDHCI);
object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort);
- sysbus_init_child_obj(obj, "emmc-controller.sdhci",
- OBJECT(&s->emmc.slots[0]), sizeof(s->emmc.slots[0]),
- TYPE_SYSBUS_SDHCI);
+ object_initialize_child(obj, "emmc-controller.sdhci", &s->emmc.slots[0],
+ TYPE_SYSBUS_SDHCI);
}
/*
int i;
AspeedSoCState *s = ASPEED_SOC(dev);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- Error *err = NULL, *local_err = NULL;
+ Error *err = NULL;
qemu_irq irq;
/* IO space */
create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO],
0x1000);
- if (s->num_cpus > sc->num_cpus) {
- warn_report("%s: invalid number of CPUs %d, using default %d",
- sc->name, s->num_cpus, sc->num_cpus);
- s->num_cpus = sc->num_cpus;
- }
-
/* CPU */
- for (i = 0; i < s->num_cpus; i++) {
+ for (i = 0; i < sc->num_cpus; i++) {
object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
"psci-conduit", &error_abort);
- if (s->num_cpus > 1) {
+ if (sc->num_cpus > 1) {
object_property_set_int(OBJECT(&s->cpu[i]),
ASPEED_A7MPCORE_ADDR,
"reset-cbar", &error_abort);
* is needed when using -kernel
*/
- object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
- if (err) {
+ if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, &err)) {
error_propagate(errp, err);
return;
}
}
/* A7MPCORE */
- object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu",
+ object_property_set_int(OBJECT(&s->a7mpcore), sc->num_cpus, "num-cpu",
&error_abort);
object_property_set_int(OBJECT(&s->a7mpcore),
ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
"num-irq", &error_abort);
- object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized",
- &error_abort);
+ sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, ASPEED_A7MPCORE_ADDR);
- for (i = 0; i < s->num_cpus; i++) {
+ for (i = 0; i < sc->num_cpus; i++) {
SysBusDevice *sbd = SYS_BUS_DEVICE(&s->a7mpcore);
DeviceState *d = DEVICE(qemu_get_cpu(i));
irq = qdev_get_gpio_in(d, ARM_CPU_IRQ);
sysbus_connect_irq(sbd, i, irq);
irq = qdev_get_gpio_in(d, ARM_CPU_FIQ);
- sysbus_connect_irq(sbd, i + s->num_cpus, irq);
+ sysbus_connect_irq(sbd, i + sc->num_cpus, irq);
irq = qdev_get_gpio_in(d, ARM_CPU_VIRQ);
- sysbus_connect_irq(sbd, i + 2 * s->num_cpus, irq);
+ sysbus_connect_irq(sbd, i + 2 * sc->num_cpus, irq);
irq = qdev_get_gpio_in(d, ARM_CPU_VFIQ);
- sysbus_connect_irq(sbd, i + 3 * s->num_cpus, irq);
+ sysbus_connect_irq(sbd, i + 3 * sc->num_cpus, irq);
}
/* SRAM */
sc->memmap[ASPEED_SRAM], &s->sram);
/* SCU */
- object_property_set_bool(OBJECT(&s->scu), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), &err)) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]);
/* RTC */
- object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &err)) {
error_propagate(errp, err);
return;
}
/* Timer */
object_property_set_link(OBJECT(&s->timerctrl),
OBJECT(&s->scu), "scu", &error_abort);
- object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), &err)) {
error_propagate(errp, err);
return;
}
}
/* I2C */
- object_property_set_link(OBJECT(&s->i2c), OBJECT(s->dram_mr), "dram", &err);
- if (err) {
- error_propagate(errp, err);
- return;
- }
- object_property_set_bool(OBJECT(&s->i2c), true, "realized", &err);
- if (err) {
+ object_property_set_link(OBJECT(&s->i2c), OBJECT(s->dram_mr), "dram",
+ &error_abort);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), &err)) {
error_propagate(errp, err);
return;
}
}
/* FMC, The number of CS is set at the board level */
- object_property_set_link(OBJECT(&s->fmc), OBJECT(s->dram_mr), "dram", &err);
- if (err) {
- error_propagate(errp, err);
- return;
- }
+ object_property_set_link(OBJECT(&s->fmc), OBJECT(s->dram_mr), "dram",
+ &error_abort);
object_property_set_int(OBJECT(&s->fmc), sc->memmap[ASPEED_SDRAM],
"sdram-base", &err);
if (err) {
error_propagate(errp, err);
return;
}
- object_property_set_bool(OBJECT(&s->fmc), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), &err)) {
error_propagate(errp, err);
return;
}
/* SPI */
for (i = 0; i < sc->spis_num; i++) {
object_property_set_link(OBJECT(&s->spi[i]), OBJECT(s->dram_mr),
- "dram", &err);
- if (err) {
- error_propagate(errp, err);
- return;
- }
- object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err);
- object_property_set_bool(OBJECT(&s->spi[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
- if (err) {
+ "dram", &error_abort);
+ object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs",
+ &error_abort);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err)) {
error_propagate(errp, err);
return;
}
/* EHCI */
for (i = 0; i < sc->ehcis_num; i++) {
- object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &err)) {
error_propagate(errp, err);
return;
}
}
/* SDMC - SDRAM Memory Controller */
- object_property_set_bool(OBJECT(&s->sdmc), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), &err)) {
error_propagate(errp, err);
return;
}
object_property_set_link(OBJECT(&s->wdt[i]),
OBJECT(&s->scu), "scu", &error_abort);
- object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &err)) {
error_propagate(errp, err);
return;
}
}
/* Net */
- for (i = 0; i < nb_nics && i < sc->macs_num; i++) {
- qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
+ for (i = 0; i < sc->macs_num; i++) {
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
- &err);
- object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
- &local_err);
- error_propagate(&err, local_err);
- if (err) {
+ &error_abort);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), &err)) {
error_propagate(errp, err);
- return;
+ return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_ETH1 + i]);
object_property_set_link(OBJECT(&s->mii[i]), OBJECT(&s->ftgmac100[i]),
"nic", &error_abort);
- object_property_set_bool(OBJECT(&s->mii[i]), true, "realized",
- &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->mii[i]), &err)) {
error_propagate(errp, err);
return;
}
}
/* XDMA */
- object_property_set_bool(OBJECT(&s->xdma), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->xdma), &err)) {
error_propagate(errp, err);
return;
}
aspeed_soc_get_irq(s, ASPEED_XDMA));
/* GPIO */
- object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err)) {
error_propagate(errp, err);
return;
}
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
aspeed_soc_get_irq(s, ASPEED_GPIO));
- object_property_set_bool(OBJECT(&s->gpio_1_8v), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio_1_8v), &err)) {
error_propagate(errp, err);
return;
}
aspeed_soc_get_irq(s, ASPEED_GPIO_1_8V));
/* SDHCI */
- object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), &err)) {
error_propagate(errp, err);
return;
}
aspeed_soc_get_irq(s, ASPEED_SDHCI));
/* eMMC */
- object_property_set_bool(OBJECT(&s->emmc), true, "realized", &err);
- if (err) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), &err)) {
error_propagate(errp, err);
return;
}
dc->realize = aspeed_soc_ast2600_realize;
- sc->name = "ast2600-a0";
+ sc->name = "ast2600-a1";
sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
- sc->silicon_rev = AST2600_A0_SILICON_REV;
+ sc->silicon_rev = AST2600_A1_SILICON_REV;
sc->sram_size = 0x10000;
sc->spis_num = 2;
sc->ehcis_num = 2;
}
static const TypeInfo aspeed_soc_ast2600_type_info = {
- .name = "ast2600-a0",
+ .name = "ast2600-a1",
.parent = TYPE_ASPEED_SOC,
.instance_size = sizeof(AspeedSoCState),
.instance_init = aspeed_soc_ast2600_init,
projects / mirror_qemu.git / blobdiff