#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "qemu-common.h"
#include "cpu.h"
#include "hw/arm/fsl-imx25.h"
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
-#include "hw/boards.h"
+#include "hw/qdev-properties.h"
#include "chardev/char.h"
+#define IMX25_ESDHC_CAPABILITIES 0x07e20000
+
static void fsl_imx25_init(Object *obj)
{
FslIMX25State *s = FSL_IMX25(obj);
int i;
- object_initialize(&s->cpu, sizeof(s->cpu), "arm926-" TYPE_ARM_CPU);
+ object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926"));
- object_initialize(&s->avic, sizeof(s->avic), TYPE_IMX_AVIC);
- qdev_set_parent_bus(DEVICE(&s->avic), sysbus_get_default());
+ object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC);
- object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX25_CCM);
- qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
+ object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX25_CCM);
for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {
- object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
- qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
+ object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL);
}
for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
- object_initialize(&s->gpt[i], sizeof(s->gpt[i]), TYPE_IMX25_GPT);
- qdev_set_parent_bus(DEVICE(&s->gpt[i]), sysbus_get_default());
+ object_initialize_child(obj, "gpt[*]", &s->gpt[i], TYPE_IMX25_GPT);
}
for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) {
- object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
- qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
+ object_initialize_child(obj, "epit[*]", &s->epit[i], TYPE_IMX_EPIT);
}
- object_initialize(&s->fec, sizeof(s->fec), TYPE_IMX_FEC);
- qdev_set_parent_bus(DEVICE(&s->fec), sysbus_get_default());
+ object_initialize_child(obj, "fec", &s->fec, TYPE_IMX_FEC);
+
+ object_initialize_child(obj, "rngc", &s->rngc, TYPE_IMX_RNGC);
for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
- object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
- qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
+ object_initialize_child(obj, "i2c[*]", &s->i2c[i], TYPE_IMX_I2C);
}
for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
- object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
- qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
+ object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO);
+ }
+
+ for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) {
+ object_initialize_child(obj, "sdhc[*]", &s->esdhc[i], TYPE_IMX_USDHC);
+ }
+
+ for (i = 0; i < FSL_IMX25_NUM_USBS; i++) {
+ object_initialize_child(obj, "usb[*]", &s->usb[i], TYPE_CHIPIDEA);
}
+
+ object_initialize_child(obj, "wdt", &s->wdt, TYPE_IMX2_WDT);
}
static void fsl_imx25_realize(DeviceState *dev, Error **errp)
uint8_t i;
Error *err = NULL;
- object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+ qdev_realize(DEVICE(&s->cpu), NULL, &err);
if (err) {
error_propagate(errp, err);
return;
}
- object_property_set_bool(OBJECT(&s->avic), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->avic), &err);
if (err) {
error_propagate(errp, err);
return;
sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1,
qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
- object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &err);
if (err) {
error_propagate(errp, err);
return;
{ FSL_IMX25_UART5_ADDR, FSL_IMX25_UART5_IRQ }
};
- if (i < MAX_SERIAL_PORTS) {
- Chardev *chr;
-
- chr = serial_hds[i];
-
- if (!chr) {
- char label[20];
- snprintf(label, sizeof(label), "imx31.uart%d", i);
- chr = qemu_chr_new(label, "null");
- }
-
- qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", chr);
- }
+ qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
- object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &err);
if (err) {
error_propagate(errp, err);
return;
s->gpt[i].ccm = IMX_CCM(&s->ccm);
- object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &err);
if (err) {
error_propagate(errp, err);
return;
s->epit[i].ccm = IMX_CCM(&s->ccm);
- object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &err);
if (err) {
error_propagate(errp, err);
return;
qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
- object_property_set_bool(OBJECT(&s->fec), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->fec), &err);
if (err) {
error_propagate(errp, err);
return;
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fec), 0,
qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_FEC_IRQ));
+ sysbus_realize(SYS_BUS_DEVICE(&s->rngc), &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->rngc), 0, FSL_IMX25_RNGC_ADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->rngc), 0,
+ qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_RNGC_IRQ));
/* Initialize all I2C */
for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
{ FSL_IMX25_I2C3_ADDR, FSL_IMX25_I2C3_IRQ }
};
- object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &err);
if (err) {
error_propagate(errp, err);
return;
{ FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ }
};
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err);
if (err) {
error_propagate(errp, err);
return;
gpio_table[i].irq));
}
+ /* Initialize all SDHC */
+ for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) {
+ static const struct {
+ hwaddr addr;
+ unsigned int irq;
+ } esdhc_table[FSL_IMX25_NUM_ESDHCS] = {
+ { FSL_IMX25_ESDHC1_ADDR, FSL_IMX25_ESDHC1_IRQ },
+ { FSL_IMX25_ESDHC2_ADDR, FSL_IMX25_ESDHC2_IRQ },
+ };
+
+ object_property_set_uint(OBJECT(&s->esdhc[i]), 2, "sd-spec-version",
+ &err);
+ object_property_set_uint(OBJECT(&s->esdhc[i]), IMX25_ESDHC_CAPABILITIES,
+ "capareg", &err);
+ object_property_set_uint(OBJECT(&s->esdhc[i]), SDHCI_VENDOR_IMX,
+ "vendor", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->avic),
+ esdhc_table[i].irq));
+ }
+
+ /* USB */
+ for (i = 0; i < FSL_IMX25_NUM_USBS; i++) {
+ static const struct {
+ hwaddr addr;
+ unsigned int irq;
+ } usb_table[FSL_IMX25_NUM_USBS] = {
+ { FSL_IMX25_USB1_ADDR, FSL_IMX25_USB1_IRQ },
+ { FSL_IMX25_USB2_ADDR, FSL_IMX25_USB2_IRQ },
+ };
+
+ sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_table[i].addr);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->avic),
+ usb_table[i].irq));
+ }
+
+ /* Watchdog */
+ object_property_set_bool(OBJECT(&s->wdt), true, "pretimeout-support",
+ &error_abort);
+ sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX25_WDT_ADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt), 0,
+ qdev_get_gpio_in(DEVICE(&s->avic),
+ FSL_IMX25_WDT_IRQ));
+
/* initialize 2 x 16 KB ROM */
- memory_region_init_rom_nomigrate(&s->rom[0], NULL,
- "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
+ memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0",
+ FSL_IMX25_ROM0_SIZE, &err);
if (err) {
error_propagate(errp, err);
return;
}
memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR,
&s->rom[0]);
- memory_region_init_rom_nomigrate(&s->rom[1], NULL,
- "imx25.rom1", FSL_IMX25_ROM1_SIZE, &err);
+ memory_region_init_rom(&s->rom[1], OBJECT(dev), "imx25.rom1",
+ FSL_IMX25_ROM1_SIZE, &err);
if (err) {
error_propagate(errp, err);
return;
&s->iram);
/* internal RAM (128 KB) is aliased over 128 MB - 128 KB */
- memory_region_init_alias(&s->iram_alias, NULL, "imx25.iram_alias",
+ memory_region_init_alias(&s->iram_alias, OBJECT(dev), "imx25.iram_alias",
&s->iram, 0, FSL_IMX25_IRAM_ALIAS_SIZE);
memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ALIAS_ADDR,
&s->iram_alias);
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = fsl_imx25_realize;
-
dc->desc = "i.MX25 SOC";
+ /*
+ * Reason: uses serial_hds in realize and the imx25 board does not
+ * support multiple CPUs
+ */
+ dc->user_creatable = false;
}
static const TypeInfo fsl_imx25_type_info = {
projects / mirror_qemu.git / blobdiff