#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "qemu-common.h"
-#include "cpu.h"
#include "hw/arm/fsl-imx31.h"
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
-#include "hw/boards.h"
+#include "hw/qdev-properties.h"
#include "chardev/char.h"
static void fsl_imx31_init(Object *obj)
FslIMX31State *s = FSL_IMX31(obj);
int i;
- object_initialize(&s->cpu, sizeof(s->cpu), "arm1136-" TYPE_ARM_CPU);
+ object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm1136"));
- object_initialize(&s->avic, sizeof(s->avic), TYPE_IMX_AVIC);
- qdev_set_parent_bus(DEVICE(&s->avic), sysbus_get_default());
+ object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC);
- object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX31_CCM);
- qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
+ object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX31_CCM);
for (i = 0; i < FSL_IMX31_NUM_UARTS; i++) {
- object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
- qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
+ object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL);
}
- object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX31_GPT);
- qdev_set_parent_bus(DEVICE(&s->gpt), sysbus_get_default());
+ object_initialize_child(obj, "gpt", &s->gpt, TYPE_IMX31_GPT);
for (i = 0; i < FSL_IMX31_NUM_EPITS; i++) {
- object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
- qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
+ object_initialize_child(obj, "epit[*]", &s->epit[i], TYPE_IMX_EPIT);
}
for (i = 0; i < FSL_IMX31_NUM_I2CS; i++) {
- object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
- qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
+ object_initialize_child(obj, "i2c[*]", &s->i2c[i], TYPE_IMX_I2C);
}
for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {
- object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
- qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
+ object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO);
}
+
+ object_initialize_child(obj, "wdt", &s->wdt, TYPE_IMX2_WDT);
}
static void fsl_imx31_realize(DeviceState *dev, Error **errp)
uint16_t i;
Error *err = NULL;
- object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) {
return;
}
- object_property_set_bool(OBJECT(&s->avic), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->avic), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX31_AVIC_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1,
qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
- object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->ccm), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX31_CCM_ADDR);
{ FSL_IMX31_UART2_ADDR, FSL_IMX31_UART2_IRQ },
};
- if (i < MAX_SERIAL_PORTS) {
- Chardev *chr;
-
- chr = serial_hds[i];
+ qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
- if (!chr) {
- char label[20];
- snprintf(label, sizeof(label), "imx31.uart%d", i);
- chr = qemu_chr_new(label, "null");
- }
-
- qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", chr);
- }
-
- object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), errp)) {
return;
}
s->gpt.ccm = IMX_CCM(&s->ccm);
- object_property_set_bool(OBJECT(&s->gpt), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt), errp)) {
return;
}
s->epit[i].ccm = IMX_CCM(&s->ccm);
- object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) {
return;
}
};
/* Initialize the I2C */
- object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), errp)) {
return;
}
/* Map I2C memory */
{ FSL_IMX31_GPIO3_ADDR, FSL_IMX31_GPIO3_IRQ }
};
- object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",
+ object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", false,
&error_abort);
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
- if (err) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
gpio_table[i].irq));
}
+ /* Watchdog */
+ sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX31_WDT_ADDR);
+
/* On a real system, the first 16k is a `secure boot rom' */
- memory_region_init_rom_nomigrate(&s->secure_rom, NULL, "imx31.secure_rom",
+ memory_region_init_rom(&s->secure_rom, OBJECT(dev), "imx31.secure_rom",
FSL_IMX31_SECURE_ROM_SIZE, &err);
if (err) {
error_propagate(errp, err);
&s->secure_rom);
/* There is also a 16k ROM */
- memory_region_init_rom_nomigrate(&s->rom, NULL, "imx31.rom",
+ memory_region_init_rom(&s->rom, OBJECT(dev), "imx31.rom",
FSL_IMX31_ROM_SIZE, &err);
if (err) {
error_propagate(errp, err);
&s->iram);
/* internal RAM (16 KB) is aliased over 256 MB - 16 KB */
- memory_region_init_alias(&s->iram_alias, NULL, "imx31.iram_alias",
+ memory_region_init_alias(&s->iram_alias, OBJECT(dev), "imx31.iram_alias",
&s->iram, 0, FSL_IMX31_IRAM_ALIAS_SIZE);
memory_region_add_subregion(get_system_memory(), FSL_IMX31_IRAM_ALIAS_ADDR,
&s->iram_alias);
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = fsl_imx31_realize;
-
dc->desc = "i.MX31 SOC";
+ /*
+ * Reason: uses serial_hds in realize and the kzm board does not
+ * support multiple CPUs
+ */
+ dc->user_creatable = false;
}
static const TypeInfo fsl_imx31_type_info = {