*/
#include "qemu/osdep.h"
+#include "qemu/error-report.h"
#include "qapi/error.h"
-#include "qemu-common.h"
#include "cpu.h"
-#include "sysemu/block-backend.h"
+#include "exec/address-spaces.h"
#include "sysemu/blockdev.h"
+#include "sysemu/qtest.h"
+#include "sysemu/reset.h"
+#include "sysemu/runstate.h"
#include "hw/boards.h"
-#include "hw/hw.h"
-#include "hw/arm/arm.h"
+#include "hw/irq.h"
+#include "hw/qdev-properties.h"
+#include "hw/arm/boot.h"
#include "hw/arm/omap.h"
#include "sysemu/sysemu.h"
#include "qemu/timer.h"
* does I2S specify it? */
/* All register writes are 16 bits so we we store 16-bit samples
* in the buffers regardless of AGCFR[B8_16] value. */
- fmt.fmt = AUD_FMT_U16;
+ fmt.fmt = AUDIO_FORMAT_U16;
s->codec.in_voice = AUD_open_in(&s->codec.card, s->codec.in_voice,
"eac.codec.in", s, omap_eac_in_cb, &fmt);
s->irq = irq;
omap_sti_reset(s);
- qemu_chr_fe_init(&s->chr, chr ?: qemu_chr_new("null", "null"),
+ qemu_chr_fe_init(&s->chr, chr ?: qemu_chr_new("null", "null", NULL),
&error_abort);
memory_region_init_io(&s->iomem, NULL, &omap_sti_ops, s, "omap.sti",
{ 0, OMAP_INT_24XX_SDMA_IRQ3 },
};
-struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
- unsigned long sdram_size,
+struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram,
const char *cpu_type)
{
struct omap_mpu_state_s *s = g_new0(struct omap_mpu_state_s, 1);
int i;
SysBusDevice *busdev;
struct omap_target_agent_s *ta;
+ MemoryRegion *sysmem = get_system_memory();
/* Core */
s->mpu_model = omap2420;
s->cpu = ARM_CPU(cpu_create(cpu_type));
- s->sdram_size = sdram_size;
s->sram_size = OMAP242X_SRAM_SIZE;
s->wakeup = qemu_allocate_irq(omap_mpu_wakeup, s, 0);
omap_clk_init(s);
/* Memory-mapped stuff */
- memory_region_allocate_system_memory(&s->sdram, NULL, "omap2.dram",
- s->sdram_size);
- memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram);
memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size,
&error_fatal);
memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram);
s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54);
/* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */
- s->ih[0] = qdev_create(NULL, "omap2-intc");
+ s->ih[0] = qdev_new("omap2-intc");
qdev_prop_set_uint8(s->ih[0], "revision", 0x21);
- qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk"));
- qdev_prop_set_ptr(s->ih[0], "iclk", omap_findclk(s, "mpu_intc_iclk"));
- qdev_init_nofail(s->ih[0]);
+ omap_intc_set_fclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_fclk"));
+ omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_iclk"));
busdev = SYS_BUS_DEVICE(s->ih[0]);
+ sysbus_realize_and_unref(busdev, &error_fatal);
sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
sysbus_connect_irq(busdev, 1,
s->port->addr_valid = omap2_validate_addr;
/* Register SDRAM and SRAM ports for fast DMA transfers. */
- soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->sdram),
- OMAP2_Q2_BASE, s->sdram_size);
+ soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(sdram),
+ OMAP2_Q2_BASE, memory_region_size(sdram));
soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->sram),
OMAP2_SRAM_BASE, s->sram_size);
s->drq[OMAP24XX_DMA_UART1_TX],
s->drq[OMAP24XX_DMA_UART1_RX],
"uart1",
- serial_hds[0]);
+ serial_hd(0));
s->uart[1] = omap2_uart_init(sysmem, omap_l4ta(s->l4, 20),
qdev_get_gpio_in(s->ih[0],
OMAP_INT_24XX_UART2_IRQ),
s->drq[OMAP24XX_DMA_UART2_TX],
s->drq[OMAP24XX_DMA_UART2_RX],
"uart2",
- serial_hds[0] ? serial_hds[1] : NULL);
+ serial_hd(0) ? serial_hd(1) : NULL);
s->uart[2] = omap2_uart_init(sysmem, omap_l4ta(s->l4, 21),
qdev_get_gpio_in(s->ih[0],
OMAP_INT_24XX_UART3_IRQ),
s->drq[OMAP24XX_DMA_UART3_TX],
s->drq[OMAP24XX_DMA_UART3_RX],
"uart3",
- serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);
+ serial_hd(0) && serial_hd(1) ? serial_hd(2) : NULL);
s->gptimer[0] = omap_gp_timer_init(omap_l4ta(s->l4, 7),
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPTIMER1),
omap_findclk(s, "clk32-kHz"),
omap_findclk(s, "core_l4_iclk"));
- s->i2c[0] = qdev_create(NULL, "omap_i2c");
+ s->i2c[0] = qdev_new("omap_i2c");
qdev_prop_set_uint8(s->i2c[0], "revision", 0x34);
- qdev_prop_set_ptr(s->i2c[0], "iclk", omap_findclk(s, "i2c1.iclk"));
- qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "i2c1.fclk"));
- qdev_init_nofail(s->i2c[0]);
+ omap_i2c_set_iclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.iclk"));
+ omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.fclk"));
busdev = SYS_BUS_DEVICE(s->i2c[0]);
+ sysbus_realize_and_unref(busdev, &error_fatal);
sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C1_IRQ));
sysbus_connect_irq(busdev, 1, s->drq[OMAP24XX_DMA_I2C1_TX]);
sysbus_connect_irq(busdev, 2, s->drq[OMAP24XX_DMA_I2C1_RX]);
sysbus_mmio_map(busdev, 0, omap_l4_region_base(omap_l4tao(s->l4, 5), 0));
- s->i2c[1] = qdev_create(NULL, "omap_i2c");
+ s->i2c[1] = qdev_new("omap_i2c");
qdev_prop_set_uint8(s->i2c[1], "revision", 0x34);
- qdev_prop_set_ptr(s->i2c[1], "iclk", omap_findclk(s, "i2c2.iclk"));
- qdev_prop_set_ptr(s->i2c[1], "fclk", omap_findclk(s, "i2c2.fclk"));
- qdev_init_nofail(s->i2c[1]);
+ omap_i2c_set_iclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.iclk"));
+ omap_i2c_set_fclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.fclk"));
busdev = SYS_BUS_DEVICE(s->i2c[1]);
+ sysbus_realize_and_unref(busdev, &error_fatal);
sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C2_IRQ));
sysbus_connect_irq(busdev, 1, s->drq[OMAP24XX_DMA_I2C2_TX]);
sysbus_connect_irq(busdev, 2, s->drq[OMAP24XX_DMA_I2C2_RX]);
sysbus_mmio_map(busdev, 0, omap_l4_region_base(omap_l4tao(s->l4, 6), 0));
- s->gpio = qdev_create(NULL, "omap2-gpio");
+ s->gpio = qdev_new("omap2-gpio");
qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);
- qdev_prop_set_ptr(s->gpio, "iclk", omap_findclk(s, "gpio_iclk"));
- qdev_prop_set_ptr(s->gpio, "fclk0", omap_findclk(s, "gpio1_dbclk"));
- qdev_prop_set_ptr(s->gpio, "fclk1", omap_findclk(s, "gpio2_dbclk"));
- qdev_prop_set_ptr(s->gpio, "fclk2", omap_findclk(s, "gpio3_dbclk"));
- qdev_prop_set_ptr(s->gpio, "fclk3", omap_findclk(s, "gpio4_dbclk"));
+ omap2_gpio_set_iclk(OMAP2_GPIO(s->gpio), omap_findclk(s, "gpio_iclk"));
+ omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 0, omap_findclk(s, "gpio1_dbclk"));
+ omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 1, omap_findclk(s, "gpio2_dbclk"));
+ omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 2, omap_findclk(s, "gpio3_dbclk"));
+ omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 3, omap_findclk(s, "gpio4_dbclk"));
if (s->mpu_model == omap2430) {
- qdev_prop_set_ptr(s->gpio, "fclk4", omap_findclk(s, "gpio5_dbclk"));
+ omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 4,
+ omap_findclk(s, "gpio5_dbclk"));
}
- qdev_init_nofail(s->gpio);
busdev = SYS_BUS_DEVICE(s->gpio);
+ sysbus_realize_and_unref(busdev, &error_fatal);
sysbus_connect_irq(busdev, 0,
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPIO_BANK1));
sysbus_connect_irq(busdev, 3,
s->drq[OMAP24XX_DMA_GPMC]);
dinfo = drive_get(IF_SD, 0, 0);
- if (!dinfo) {
- fprintf(stderr, "qemu: missing SecureDigital device\n");
- exit(1);
+ if (!dinfo && !qtest_enabled()) {
+ warn_report("missing SecureDigital device");
}
s->mmc = omap2_mmc_init(omap_l4tao(s->l4, 9),
- blk_by_legacy_dinfo(dinfo),
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_MMC_IRQ),
&s->drq[OMAP24XX_DMA_MMC1_TX],
omap_findclk(s, "mmc_fclk"), omap_findclk(s, "mmc_iclk"));
omap_sti_init(omap_l4ta(s->l4, 18), sysmem, 0x54000000,
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_STI),
omap_findclk(s, "emul_ck"),
- serial_hds[0] && serial_hds[1] && serial_hds[2] ?
- serial_hds[3] : NULL);
+ serial_hd(0) && serial_hd(1) && serial_hd(2) ?
+ serial_hd(3) : NULL);
s->eac = omap_eac_init(omap_l4ta(s->l4, 32),
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_EAC_IRQ),
projects / mirror_qemu.git / blobdiff