*/
#include "qemu/osdep.h"
-#include "qapi/error.h"
#include "qemu-common.h"
+#include "qemu/error-report.h"
+#include "qemu/module.h"
+#include "qapi/error.h"
#include "cpu.h"
#include "hw/sysbus.h"
+#include "migration/vmstate.h"
#include "hw/arm/pxa.h"
#include "sysemu/sysemu.h"
#include "hw/char/serial.h"
#include "hw/i2c/i2c.h"
+#include "hw/irq.h"
+#include "hw/qdev-properties.h"
#include "hw/ssi/ssi.h"
#include "chardev/char-fe.h"
-#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
+#include "sysemu/qtest.h"
#include "qemu/cutils.h"
static struct {
return s->pm_regs[addr >> 2];
default:
fail:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
break;
}
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
return s->cm_regs[CCCR >> 2] | (3 << 28);
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
case MDCNFG ... SA1110:
if ((addr & 3) == 0)
return s->mm_regs[addr >> 2];
-
+ /* fall through */
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
}
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
if (!s->enable)
return 0xffffffff;
if (s->rx_level < 1) {
- printf("%s: SSP Rx Underrun\n", __FUNCTION__);
+ printf("%s: SSP Rx Underrun\n", __func__);
return 0xffffffff;
}
s->rx_level --;
case SSACD:
return s->ssacd;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
s->sscr[0] = value & 0xc7ffffff;
s->enable = value & SSCR0_SSE;
if (value & SSCR0_MOD)
- printf("%s: Attempt to use network mode\n", __FUNCTION__);
+ printf("%s: Attempt to use network mode\n", __func__);
if (s->enable && SSCR0_DSS(value) < 4)
- printf("%s: Wrong data size: %i bits\n", __FUNCTION__,
+ printf("%s: Wrong data size: %i bits\n", __func__,
SSCR0_DSS(value));
if (!(value & SSCR0_SSE)) {
s->sssr = 0;
case SSCR1:
s->sscr[1] = value;
if (value & (SSCR1_LBM | SSCR1_EFWR))
- printf("%s: Attempt to use SSP test mode\n", __FUNCTION__);
+ printf("%s: Attempt to use SSP test mode\n", __func__);
pxa2xx_ssp_fifo_update(s);
break;
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
else
return s->last_swcr;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
s->last_rtcpicr = 0;
s->last_hz = s->last_sw = s->last_pi = qemu_clock_get_ms(rtc_clock);
+ sysbus_init_irq(dev, &s->rtc_irq);
+
+ memory_region_init_io(&s->iomem, obj, &pxa2xx_rtc_ops, s,
+ "pxa2xx-rtc", 0x10000);
+ sysbus_init_mmio(dev, &s->iomem);
+}
+
+static void pxa2xx_rtc_realize(DeviceState *dev, Error **errp)
+{
+ PXA2xxRTCState *s = PXA2XX_RTC(dev);
s->rtc_hz = timer_new_ms(rtc_clock, pxa2xx_rtc_hz_tick, s);
s->rtc_rdal1 = timer_new_ms(rtc_clock, pxa2xx_rtc_rdal1_tick, s);
s->rtc_rdal2 = timer_new_ms(rtc_clock, pxa2xx_rtc_rdal2_tick, s);
s->rtc_swal1 = timer_new_ms(rtc_clock, pxa2xx_rtc_swal1_tick, s);
s->rtc_swal2 = timer_new_ms(rtc_clock, pxa2xx_rtc_swal2_tick, s);
s->rtc_pi = timer_new_ms(rtc_clock, pxa2xx_rtc_pi_tick, s);
-
- sysbus_init_irq(dev, &s->rtc_irq);
-
- memory_region_init_io(&s->iomem, obj, &pxa2xx_rtc_ops, s,
- "pxa2xx-rtc", 0x10000);
- sysbus_init_mmio(dev, &s->iomem);
}
-static void pxa2xx_rtc_pre_save(void *opaque)
+static int pxa2xx_rtc_pre_save(void *opaque)
{
PXA2xxRTCState *s = (PXA2xxRTCState *) opaque;
pxa2xx_rtc_hzupdate(s);
pxa2xx_rtc_piupdate(s);
pxa2xx_rtc_swupdate(s);
+
+ return 0;
}
static int pxa2xx_rtc_post_load(void *opaque, int version_id)
dc->desc = "PXA2xx RTC Controller";
dc->vmsd = &vmstate_pxa2xx_rtc_regs;
+ dc->realize = pxa2xx_rtc_realize;
}
static const TypeInfo pxa2xx_rtc_sysbus_info = {
return 0;
}
-static int pxa2xx_i2c_rx(I2CSlave *i2c)
+static uint8_t pxa2xx_i2c_rx(I2CSlave *i2c)
{
PXA2xxI2CSlaveState *slave = PXA2XX_I2C_SLAVE(i2c);
PXA2xxI2CState *s = slave->host;
s->ibmr = 0;
return s->ibmr;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
dc->desc = "PXA2xx I2C Bus Controller";
dc->vmsd = &vmstate_pxa2xx_i2c;
- dc->props = pxa2xx_i2c_properties;
+ device_class_set_props(dc, pxa2xx_i2c_properties);
}
static const TypeInfo pxa2xx_i2c_info = {
}
return 0;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
s->status &= ~(1 << 7); /* I2SOFF */
}
if (value & (1 << 4)) /* EFWR */
- printf("%s: Attempt to use special function\n", __FUNCTION__);
+ printf("%s: Attempt to use special function\n", __func__);
s->enable = (value & 9) == 1; /* ENB && !RST*/
pxa2xx_i2s_update(s);
break;
case SACR1:
s->control[1] = value & 0x0039;
if (value & (1 << 5)) /* ENLBF */
- printf("%s: Attempt to use loopback function\n", __FUNCTION__);
+ printf("%s: Attempt to use loopback function\n", __func__);
if (value & (1 << 4)) /* DPRL */
s->fifo_len = 0;
pxa2xx_i2s_update(s);
}
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
pxa2xx_fir_update(s);
return ret;
}
- printf("%s: Rx FIFO underrun.\n", __FUNCTION__);
+ printf("%s: Rx FIFO underrun.\n", __func__);
break;
case ICSR0:
return s->status[0];
case ICFOR:
return s->rx_len;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
case ICFOR:
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
pxa2xx_fir_update(s);
}
-static void pxa2xx_fir_event(void *opaque, int event)
+static void pxa2xx_fir_event(void *opaque, QEMUChrEvent event)
{
}
dc->realize = pxa2xx_fir_realize;
dc->vmsd = &pxa2xx_fir_vmsd;
- dc->props = pxa2xx_fir_properties;
+ device_class_set_props(dc, pxa2xx_fir_properties);
dc->reset = pxa2xx_fir_reset;
}
s = g_new0(PXA2xxState, 1);
if (strncmp(cpu_type, "pxa27", 5)) {
- fprintf(stderr, "Machine requires a PXA27x processor.\n");
+ error_report("Machine requires a PXA27x processor");
exit(1);
}
s->gpio = pxa2xx_gpio_init(0x40e00000, s->cpu, s->pic, 121);
dinfo = drive_get(IF_SD, 0, 0);
- if (!dinfo) {
- fprintf(stderr, "qemu: missing SecureDigital device\n");
- exit(1);
+ if (!dinfo && !qtest_enabled()) {
+ warn_report("missing SecureDigital device");
}
s->mmc = pxa2xx_mmci_init(address_space, 0x41100000,
- blk_by_legacy_dinfo(dinfo),
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
for (i = 0; pxa270_serial[i].io_base; i++) {
- if (serial_hds[i]) {
+ if (serial_hd(i)) {
serial_mm_init(address_space, pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
- 14857000 / 16, serial_hds[i],
+ 14857000 / 16, serial_hd(i),
DEVICE_NATIVE_ENDIAN);
} else {
break;
}
}
- if (serial_hds[i])
+ if (serial_hd(i))
s->fir = pxa2xx_fir_init(address_space, 0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_ICP),
- serial_hds[i]);
+ serial_hd(i));
s->lcd = pxa2xx_lcdc_init(address_space, 0x44000000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_LCD));
s->gpio = pxa2xx_gpio_init(0x40e00000, s->cpu, s->pic, 85);
dinfo = drive_get(IF_SD, 0, 0);
- if (!dinfo) {
- fprintf(stderr, "qemu: missing SecureDigital device\n");
- exit(1);
+ if (!dinfo && !qtest_enabled()) {
+ warn_report("missing SecureDigital device");
}
s->mmc = pxa2xx_mmci_init(address_space, 0x41100000,
- blk_by_legacy_dinfo(dinfo),
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
for (i = 0; pxa255_serial[i].io_base; i++) {
- if (serial_hds[i]) {
+ if (serial_hd(i)) {
serial_mm_init(address_space, pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
- 14745600 / 16, serial_hds[i],
+ 14745600 / 16, serial_hd(i),
DEVICE_NATIVE_ENDIAN);
} else {
break;
}
}
- if (serial_hds[i])
+ if (serial_hd(i))
s->fir = pxa2xx_fir_init(address_space, 0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_ICP),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_ICP),
- serial_hds[i]);
+ serial_hd(i));
s->lcd = pxa2xx_lcdc_init(address_space, 0x44000000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_LCD));
s->ssp[i] = (SSIBus *)qdev_get_child_bus(dev, "ssi");
}
- sysbus_create_simple("sysbus-ohci", 0x4c000000,
- qdev_get_gpio_in(s->pic, PXA2XX_PIC_USBH1));
-
s->pcmcia[0] = pxa2xx_pcmcia_init(address_space, 0x20000000);
s->pcmcia[1] = pxa2xx_pcmcia_init(address_space, 0x30000000);