* This code is licensed under the GPL.
*/
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/sysbus.h"
#include "hw/arm/arm.h"
#include "hw/arm/primecell.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "hw/i2c/i2c.h"
-#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
#include "qemu/error-report.h"
+#include "hw/char/pl011.h"
+#include "hw/cpu/a9mpcore.h"
+#include "hw/intc/realview_gic.h"
#define SMP_BOOT_ADDR 0xe0000000
#define SMP_BOOTREG_ADDR 0x10000030
{
ARMCPU *cpu = NULL;
CPUARMState *env;
- ObjectClass *cpu_oc;
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram_lo;
MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
break;
}
- cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, machine->cpu_model);
- if (!cpu_oc) {
- fprintf(stderr, "Unable to find CPU definition\n");
- exit(1);
- }
-
for (n = 0; n < smp_cpus; n++) {
- Object *cpuobj = object_new(object_class_get_name(cpu_oc));
- Error *err = NULL;
+ Object *cpuobj = object_new(machine->cpu_type);
/* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board
* does not currently support EL3 so the CPU EL3 property is disabled
* before realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
}
if (is_pb && is_mpcore) {
- object_property_set_int(cpuobj, periphbase, "reset-cbar", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_int(cpuobj, periphbase, "reset-cbar",
+ &error_fatal);
}
- object_property_set_bool(cpuobj, true, "realized", &err);
- if (err) {
- error_report_err(err);
- exit(1);
- }
+ object_property_set_bool(cpuobj, true, "realized", &error_fatal);
cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
}
ram_size = 0x20000000;
memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
&error_fatal);
- vmstate_register_ram_global(ram_lo);
memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
}
memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
&error_fatal);
- vmstate_register_ram_global(ram_hi);
low_ram_size = ram_size;
if (low_ram_size > 0x10000000)
low_ram_size = 0x10000000;
sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
if (is_mpcore) {
- dev = qdev_create(NULL, is_pb ? "a9mpcore_priv": "realview_mpcore");
+ dev = qdev_create(NULL, is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore");
qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
qdev_init_nofail(dev);
busdev = SYS_BUS_DEVICE(dev);
} else {
uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000;
/* For now just create the nIRQ GIC, and ignore the others. */
- dev = sysbus_create_simple("realview_gic", gic_addr, cpu_irq[0]);
+ dev = sysbus_create_simple(TYPE_REALVIEW_GIC, gic_addr, cpu_irq[0]);
}
for (n = 0; n < 64; n++) {
pic[n] = qdev_get_gpio_in(dev, n);
sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
- sysbus_create_simple("pl011", 0x10009000, pic[12]);
- sysbus_create_simple("pl011", 0x1000a000, pic[13]);
- sysbus_create_simple("pl011", 0x1000b000, pic[14]);
- sysbus_create_simple("pl011", 0x1000c000, pic[15]);
+ pl011_create(0x10009000, pic[12], serial_hd(0));
+ pl011_create(0x1000a000, pic[13], serial_hd(1));
+ pl011_create(0x1000b000, pic[14], serial_hd(2));
+ pl011_create(0x1000c000, pic[15], serial_hd(3));
/* DMA controller is optional, apparently. */
sysbus_create_simple("pl081", 0x10030000, pic[24]);
sysbus_connect_irq(busdev, 2, pic[50]);
sysbus_connect_irq(busdev, 3, pic[51]);
pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
- if (usb_enabled()) {
+ if (machine_usb(machine)) {
pci_create_simple(pci_bus, -1, "pci-ohci");
}
n = drive_get_max_bus(IF_SCSI);
while (n >= 0) {
- pci_create_simple(pci_bus, -1, "lsi53c895a");
+ lsi53c895a_create(pci_bus);
n--;
}
}
until after Linux boots the secondary CPUs. */
memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
&error_fatal);
- vmstate_register_ram_global(ram_hack);
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
realview_binfo.ram_size = ram_size;
static void realview_eb_init(MachineState *machine)
{
- if (!machine->cpu_model) {
- machine->cpu_model = "arm926";
- }
realview_init(machine, BOARD_EB);
}
static void realview_eb_mpcore_init(MachineState *machine)
{
- if (!machine->cpu_model) {
- machine->cpu_model = "arm11mpcore";
- }
realview_init(machine, BOARD_EB_MPCORE);
}
static void realview_pb_a8_init(MachineState *machine)
{
- if (!machine->cpu_model) {
- machine->cpu_model = "cortex-a8";
- }
realview_init(machine, BOARD_PB_A8);
}
static void realview_pbx_a9_init(MachineState *machine)
{
- if (!machine->cpu_model) {
- machine->cpu_model = "cortex-a9";
- }
realview_init(machine, BOARD_PBX_A9);
}
-static void realview_eb_machine_init(MachineClass *mc)
+static void realview_eb_class_init(ObjectClass *oc, void *data)
{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
mc->desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)";
mc->init = realview_eb_init;
mc->block_default_type = IF_SCSI;
+ mc->ignore_memory_transaction_failures = true;
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926");
}
-DEFINE_MACHINE("realview-eb", realview_eb_machine_init)
+static const TypeInfo realview_eb_type = {
+ .name = MACHINE_TYPE_NAME("realview-eb"),
+ .parent = TYPE_MACHINE,
+ .class_init = realview_eb_class_init,
+};
-static void realview_eb_mpcore_machine_init(MachineClass *mc)
+static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
mc->desc = "ARM RealView Emulation Baseboard (ARM11MPCore)";
mc->init = realview_eb_mpcore_init;
mc->block_default_type = IF_SCSI;
mc->max_cpus = 4;
+ mc->ignore_memory_transaction_failures = true;
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm11mpcore");
}
-DEFINE_MACHINE("realview-eb-mpcore", realview_eb_mpcore_machine_init)
+static const TypeInfo realview_eb_mpcore_type = {
+ .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
+ .parent = TYPE_MACHINE,
+ .class_init = realview_eb_mpcore_class_init,
+};
-static void realview_pb_a8_machine_init(MachineClass *mc)
+static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
mc->desc = "ARM RealView Platform Baseboard for Cortex-A8";
mc->init = realview_pb_a8_init;
+ mc->ignore_memory_transaction_failures = true;
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
}
-DEFINE_MACHINE("realview-pb-a8", realview_pb_a8_machine_init)
+static const TypeInfo realview_pb_a8_type = {
+ .name = MACHINE_TYPE_NAME("realview-pb-a8"),
+ .parent = TYPE_MACHINE,
+ .class_init = realview_pb_a8_class_init,
+};
-static void realview_pbx_a9_machine_init(MachineClass *mc)
+static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
mc->desc = "ARM RealView Platform Baseboard Explore for Cortex-A9";
mc->init = realview_pbx_a9_init;
- mc->block_default_type = IF_SCSI;
mc->max_cpus = 4;
+ mc->ignore_memory_transaction_failures = true;
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+}
+
+static const TypeInfo realview_pbx_a9_type = {
+ .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
+ .parent = TYPE_MACHINE,
+ .class_init = realview_pbx_a9_class_init,
+};
+
+static void realview_machine_init(void)
+{
+ type_register_static(&realview_eb_type);
+ type_register_static(&realview_eb_mpcore_type);
+ type_register_static(&realview_pb_a8_type);
+ type_register_static(&realview_pbx_a9_type);
}
-DEFINE_MACHINE("realview-pbx-a9", realview_pbx_a9_machine_init)
+type_init(realview_machine_init)