#include "qemu-common.h"
#include "qemu/units.h"
#include "qemu/option.h"
+#include "monitor/qdev.h"
#include "qapi/error.h"
#include "hw/sysbus.h"
#include "hw/boards.h"
#include "sysemu/numa.h"
#include "sysemu/runstate.h"
#include "sysemu/sysemu.h"
+#include "sysemu/tpm.h"
#include "sysemu/kvm.h"
#include "hw/loader.h"
#include "exec/address-spaces.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
#include "hw/pci-host/gpex.h"
+#include "hw/virtio/virtio-pci.h"
#include "hw/arm/sysbus-fdt.h"
#include "hw/platform-bus.h"
#include "hw/qdev-properties.h"
#include "kvm_arm.h"
#include "hw/firmware/smbios.h"
#include "qapi/visitor.h"
+#include "qapi/qapi-visit-common.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
#include "hw/acpi/acpi.h"
#include "hw/mem/pc-dimm.h"
#include "hw/mem/nvdimm.h"
#include "hw/acpi/generic_event_device.h"
+#include "hw/virtio/virtio-iommu.h"
+#include "hw/char/pl011.h"
+#include "qemu/guest-random.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
[VIRT_SMMU] = { 0x09050000, 0x00020000 },
[VIRT_PCDIMM_ACPI] = { 0x09070000, MEMORY_HOTPLUG_IO_LEN },
[VIRT_ACPI_GED] = { 0x09080000, ACPI_GED_EVT_SEL_LEN },
+ [VIRT_NVDIMM_ACPI] = { 0x09090000, NVDIMM_ACPI_IO_LEN},
[VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
return false;
}
+static void create_kaslr_seed(VirtMachineState *vms, const char *node)
+{
+ Error *err = NULL;
+ uint64_t seed;
+
+ if (qemu_guest_getrandom(&seed, sizeof(seed), &err)) {
+ error_free(err);
+ return;
+ }
+ qemu_fdt_setprop_u64(vms->fdt, node, "kaslr-seed", seed);
+}
+
static void create_fdt(VirtMachineState *vms)
{
MachineState *ms = MACHINE(vms);
/* /chosen must exist for load_dtb to fill in necessary properties later */
qemu_fdt_add_subnode(fdt, "/chosen");
+ create_kaslr_seed(vms, "/chosen");
+
+ if (vms->secure) {
+ qemu_fdt_add_subnode(fdt, "/secure-chosen");
+ create_kaslr_seed(vms, "/secure-chosen");
+ }
/* Clock node, for the benefit of the UART. The kernel device tree
* binding documentation claims the PL011 node clock properties are
irqflags = GIC_FDT_IRQ_FLAGS_EDGE_LO_HI;
}
- if (vms->gic_version == 2) {
+ if (vms->gic_version == VIRT_GIC_VERSION_2) {
irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
GIC_FDT_IRQ_PPI_CPU_WIDTH,
(1 << vms->smp_cpus) - 1);
qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 0x2);
qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 0x2);
qemu_fdt_setprop(vms->fdt, nodename, "ranges", NULL, 0);
- if (vms->gic_version == 3) {
+ if (vms->gic_version == VIRT_GIC_VERSION_3) {
int nb_redist_regions = virt_gicv3_redist_region_count(vms);
qemu_fdt_setprop_string(vms->fdt, nodename, "compatible",
}
}
- if (vms->gic_version == 2) {
+ if (vms->gic_version == VIRT_GIC_VERSION_2) {
irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
GIC_FDT_IRQ_PPI_CPU_WIDTH,
(1 << vms->smp_cpus) - 1);
event |= ACPI_GED_MEM_HOTPLUG_EVT;
}
- dev = qdev_create(NULL, TYPE_ACPI_GED);
+ if (ms->nvdimms_state->is_enabled) {
+ event |= ACPI_GED_NVDIMM_HOTPLUG_EVT;
+ }
+
+ dev = qdev_new(TYPE_ACPI_GED);
qdev_prop_set_uint32(dev, "ged-event", event);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq));
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
return dev;
}
return;
}
- dev = qdev_create(NULL, itsclass);
+ dev = qdev_new(itsclass);
object_property_set_link(OBJECT(dev), OBJECT(vms->gic), "parent-gicv3",
&error_abort);
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_ITS].base);
fdt_add_its_gic_node(vms);
int irq = vms->irqmap[VIRT_GIC_V2M];
DeviceState *dev;
- dev = qdev_create(NULL, "arm-gicv2m");
+ dev = qdev_new("arm-gicv2m");
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_V2M].base);
qdev_prop_set_uint32(dev, "base-spi", irq);
qdev_prop_set_uint32(dev, "num-spi", NUM_GICV2M_SPIS);
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
for (i = 0; i < NUM_GICV2M_SPIS; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
gictype = (type == 3) ? gicv3_class_name() : gic_class_name();
- vms->gic = qdev_create(NULL, gictype);
+ vms->gic = qdev_new(gictype);
qdev_prop_set_uint32(vms->gic, "revision", type);
qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus);
/* Note that the num-irq property counts both internal and external
vms->virt);
}
}
- qdev_init_nofail(vms->gic);
gicbusdev = SYS_BUS_DEVICE(vms->gic);
+ sysbus_realize_and_unref(gicbusdev, &error_fatal);
sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base);
if (type == 3) {
sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base);
int irq = vms->irqmap[uart];
const char compat[] = "arm,pl011\0arm,primecell";
const char clocknames[] = "uartclk\0apb_pclk";
- DeviceState *dev = qdev_create(NULL, "pl011");
+ DeviceState *dev = qdev_new(TYPE_PL011);
SysBusDevice *s = SYS_BUS_DEVICE(dev);
qdev_prop_set_chr(dev, "chardev", chr);
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
memory_region_add_subregion(mem, base,
sysbus_mmio_get_region(s, 0));
sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq));
qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled");
qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay");
- qemu_fdt_add_subnode(vms->fdt, "/secure-chosen");
qemu_fdt_setprop_string(vms->fdt, "/secure-chosen", "stdout-path",
nodename);
}
* Create a single flash device. We use the same parameters as
* the flash devices on the Versatile Express board.
*/
- DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01);
+ DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE);
qdev_prop_set_uint8(dev, "width", 4);
qdev_prop_set_uint16(dev, "id2", 0x00);
qdev_prop_set_uint16(dev, "id3", 0x00);
qdev_prop_set_string(dev, "name", name);
- object_property_add_child(OBJECT(vms), name, OBJECT(dev),
- &error_abort);
+ object_property_add_child(OBJECT(vms), name, OBJECT(dev));
object_property_add_alias(OBJECT(vms), alias_prop_name,
- OBJECT(dev), "drive", &error_abort);
+ OBJECT(dev), "drive");
return PFLASH_CFI01(dev);
}
{
DeviceState *dev = DEVICE(flash);
- assert(size % VIRT_FLASH_SECTOR_SIZE == 0);
+ assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE));
assert(size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX);
qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE);
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
memory_region_add_subregion(sysmem, base,
sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
return;
}
- dev = qdev_create(NULL, "arm-smmuv3");
+ dev = qdev_new("arm-smmuv3");
object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus",
&error_abort);
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
for (i = 0; i < NUM_SMMU_IRQS; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
g_free(node);
}
+static void create_virtio_iommu_dt_bindings(VirtMachineState *vms)
+{
+ const char compat[] = "virtio,pci-iommu";
+ uint16_t bdf = vms->virtio_iommu_bdf;
+ char *node;
+
+ vms->iommu_phandle = qemu_fdt_alloc_phandle(vms->fdt);
+
+ node = g_strdup_printf("%s/virtio_iommu@%d", vms->pciehb_nodename, bdf);
+ qemu_fdt_add_subnode(vms->fdt, node);
+ qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat));
+ qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg",
+ 1, bdf << 8, 1, 0, 1, 0,
+ 1, 0, 1, 0);
+
+ qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1);
+ qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle);
+ g_free(node);
+
+ qemu_fdt_setprop_cells(vms->fdt, vms->pciehb_nodename, "iommu-map",
+ 0x0, vms->iommu_phandle, 0x0, bdf,
+ bdf + 1, vms->iommu_phandle, bdf + 1, 0xffff - bdf);
+}
+
static void create_pcie(VirtMachineState *vms)
{
hwaddr base_mmio = vms->memmap[VIRT_PCIE_MMIO].base;
int i, ecam_id;
PCIHostState *pci;
- dev = qdev_create(NULL, TYPE_GPEX_HOST);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_GPEX_HOST);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
base_ecam = vms->memmap[ecam_id].base;
}
}
- nodename = g_strdup_printf("/pcie@%" PRIx64, base);
+ nodename = vms->pciehb_nodename = g_strdup_printf("/pcie@%" PRIx64, base);
qemu_fdt_add_subnode(vms->fdt, nodename);
qemu_fdt_setprop_string(vms->fdt, nodename,
"compatible", "pci-host-ecam-generic");
if (vms->iommu) {
vms->iommu_phandle = qemu_fdt_alloc_phandle(vms->fdt);
- create_smmu(vms, pci->bus);
-
- qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map",
- 0x0, vms->iommu_phandle, 0x0, 0x10000);
+ switch (vms->iommu) {
+ case VIRT_IOMMU_SMMUV3:
+ create_smmu(vms, pci->bus);
+ qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map",
+ 0x0, vms->iommu_phandle, 0x0, 0x10000);
+ break;
+ default:
+ g_assert_not_reached();
+ }
}
-
- g_free(nodename);
}
static void create_platform_bus(VirtMachineState *vms)
int i;
MemoryRegion *sysmem = get_system_memory();
- dev = qdev_create(NULL, TYPE_PLATFORM_BUS_DEVICE);
+ dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE);
dev->id = TYPE_PLATFORM_BUS_DEVICE;
qdev_prop_set_uint32(dev, "num_irqs", PLATFORM_BUS_NUM_IRQS);
qdev_prop_set_uint32(dev, "mmio_size", vms->memmap[VIRT_PLATFORM_BUS].size);
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
vms->platform_bus_dev = dev;
s = SYS_BUS_DEVICE(dev);
* purposes are to make TCG consistent (with 64-bit KVM hosts)
* and to improve SGI efficiency.
*/
- if (vms->gic_version == 3) {
+ if (vms->gic_version == VIRT_GIC_VERSION_3) {
clustersz = GICV3_TARGETLIST_BITS;
} else {
clustersz = GIC_TARGETLIST_BITS;
}
}
+/*
+ * finalize_gic_version - Determines the final gic_version
+ * according to the gic-version property
+ *
+ * Default GIC type is v2
+ */
+static void finalize_gic_version(VirtMachineState *vms)
+{
+ unsigned int max_cpus = MACHINE(vms)->smp.max_cpus;
+
+ if (kvm_enabled()) {
+ int probe_bitmap;
+
+ if (!kvm_irqchip_in_kernel()) {
+ switch (vms->gic_version) {
+ case VIRT_GIC_VERSION_HOST:
+ warn_report(
+ "gic-version=host not relevant with kernel-irqchip=off "
+ "as only userspace GICv2 is supported. Using v2 ...");
+ return;
+ case VIRT_GIC_VERSION_MAX:
+ case VIRT_GIC_VERSION_NOSEL:
+ vms->gic_version = VIRT_GIC_VERSION_2;
+ return;
+ case VIRT_GIC_VERSION_2:
+ return;
+ case VIRT_GIC_VERSION_3:
+ error_report(
+ "gic-version=3 is not supported with kernel-irqchip=off");
+ exit(1);
+ }
+ }
+
+ probe_bitmap = kvm_arm_vgic_probe();
+ if (!probe_bitmap) {
+ error_report("Unable to determine GIC version supported by host");
+ exit(1);
+ }
+
+ switch (vms->gic_version) {
+ case VIRT_GIC_VERSION_HOST:
+ case VIRT_GIC_VERSION_MAX:
+ if (probe_bitmap & KVM_ARM_VGIC_V3) {
+ vms->gic_version = VIRT_GIC_VERSION_3;
+ } else {
+ vms->gic_version = VIRT_GIC_VERSION_2;
+ }
+ return;
+ case VIRT_GIC_VERSION_NOSEL:
+ if ((probe_bitmap & KVM_ARM_VGIC_V2) && max_cpus <= GIC_NCPU) {
+ vms->gic_version = VIRT_GIC_VERSION_2;
+ } else if (probe_bitmap & KVM_ARM_VGIC_V3) {
+ /*
+ * in case the host does not support v2 in-kernel emulation or
+ * the end-user requested more than 8 VCPUs we now default
+ * to v3. In any case defaulting to v2 would be broken.
+ */
+ vms->gic_version = VIRT_GIC_VERSION_3;
+ } else if (max_cpus > GIC_NCPU) {
+ error_report("host only supports in-kernel GICv2 emulation "
+ "but more than 8 vcpus are requested");
+ exit(1);
+ }
+ break;
+ case VIRT_GIC_VERSION_2:
+ case VIRT_GIC_VERSION_3:
+ break;
+ }
+
+ /* Check chosen version is effectively supported by the host */
+ if (vms->gic_version == VIRT_GIC_VERSION_2 &&
+ !(probe_bitmap & KVM_ARM_VGIC_V2)) {
+ error_report("host does not support in-kernel GICv2 emulation");
+ exit(1);
+ } else if (vms->gic_version == VIRT_GIC_VERSION_3 &&
+ !(probe_bitmap & KVM_ARM_VGIC_V3)) {
+ error_report("host does not support in-kernel GICv3 emulation");
+ exit(1);
+ }
+ return;
+ }
+
+ /* TCG mode */
+ switch (vms->gic_version) {
+ case VIRT_GIC_VERSION_NOSEL:
+ vms->gic_version = VIRT_GIC_VERSION_2;
+ break;
+ case VIRT_GIC_VERSION_MAX:
+ vms->gic_version = VIRT_GIC_VERSION_3;
+ break;
+ case VIRT_GIC_VERSION_HOST:
+ error_report("gic-version=host requires KVM");
+ exit(1);
+ case VIRT_GIC_VERSION_2:
+ case VIRT_GIC_VERSION_3:
+ break;
+ }
+}
+
static void machvirt_init(MachineState *machine)
{
VirtMachineState *vms = VIRT_MACHINE(machine);
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *secure_sysmem = NULL;
int n, virt_max_cpus;
- MemoryRegion *ram = g_new(MemoryRegion, 1);
bool firmware_loaded;
bool aarch64 = true;
bool has_ged = !vmc->no_ged;
/* We can probe only here because during property set
* KVM is not available yet
*/
- if (vms->gic_version <= 0) {
- /* "host" or "max" */
- if (!kvm_enabled()) {
- if (vms->gic_version == 0) {
- error_report("gic-version=host requires KVM");
- exit(1);
- } else {
- /* "max": currently means 3 for TCG */
- vms->gic_version = 3;
- }
- } else {
- vms->gic_version = kvm_arm_vgic_probe();
- if (!vms->gic_version) {
- error_report(
- "Unable to determine GIC version supported by host");
- exit(1);
- }
- }
- }
+ finalize_gic_version(vms);
if (!cpu_type_valid(machine->cpu_type)) {
error_report("mach-virt: CPU type %s not supported", machine->cpu_type);
/* The maximum number of CPUs depends on the GIC version, or on how
* many redistributors we can fit into the memory map.
*/
- if (vms->gic_version == 3) {
+ if (vms->gic_version == VIRT_GIC_VERSION_3) {
virt_max_cpus =
vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
virt_max_cpus +=
}
}
+ if (vmc->kvm_no_adjvtime &&
+ object_property_find(cpuobj, "kvm-no-adjvtime", NULL)) {
+ object_property_set_bool(cpuobj, true, "kvm-no-adjvtime", NULL);
+ }
+
if (vmc->no_pmu && object_property_find(cpuobj, "pmu", NULL)) {
object_property_set_bool(cpuobj, false, "pmu", NULL);
}
}
}
- memory_region_allocate_system_memory(ram, NULL, "mach-virt.ram",
- machine->ram_size);
- memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, ram);
+ memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base,
+ machine->ram);
if (machine->device_memory) {
memory_region_add_subregion(sysmem, machine->device_memory->base,
&machine->device_memory->mr);
create_pcie(vms);
- if (has_ged && aarch64 && firmware_loaded && acpi_enabled) {
+ if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
vms->acpi_dev = create_acpi_ged(vms);
} else {
create_gpio(vms);
create_platform_bus(vms);
+ if (machine->nvdimms_state->is_enabled) {
+ const struct AcpiGenericAddress arm_virt_nvdimm_acpi_dsmio = {
+ .space_id = AML_AS_SYSTEM_MEMORY,
+ .address = vms->memmap[VIRT_NVDIMM_ACPI].base,
+ .bit_width = NVDIMM_ACPI_IO_LEN << 3
+ };
+
+ nvdimm_init_acpi_state(machine->nvdimms_state, sysmem,
+ arm_virt_nvdimm_acpi_dsmio,
+ vms->fw_cfg, OBJECT(vms));
+ }
+
vms->bootinfo.ram_size = machine->ram_size;
vms->bootinfo.nb_cpus = smp_cpus;
vms->bootinfo.board_id = -1;
vms->its = value;
}
+bool virt_is_acpi_enabled(VirtMachineState *vms)
+{
+ if (vms->acpi == ON_OFF_AUTO_OFF) {
+ return false;
+ }
+ return true;
+}
+
+static void virt_get_acpi(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+ OnOffAuto acpi = vms->acpi;
+
+ visit_type_OnOffAuto(v, name, &acpi, errp);
+}
+
+static void virt_set_acpi(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ visit_type_OnOffAuto(v, name, &vms->acpi, errp);
+}
+
+static bool virt_get_ras(Object *obj, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ return vms->ras;
+}
+
+static void virt_set_ras(Object *obj, bool value, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ vms->ras = value;
+}
+
static char *virt_get_gic_version(Object *obj, Error **errp)
{
VirtMachineState *vms = VIRT_MACHINE(obj);
- const char *val = vms->gic_version == 3 ? "3" : "2";
+ const char *val = vms->gic_version == VIRT_GIC_VERSION_3 ? "3" : "2";
return g_strdup(val);
}
VirtMachineState *vms = VIRT_MACHINE(obj);
if (!strcmp(value, "3")) {
- vms->gic_version = 3;
+ vms->gic_version = VIRT_GIC_VERSION_3;
} else if (!strcmp(value, "2")) {
- vms->gic_version = 2;
+ vms->gic_version = VIRT_GIC_VERSION_2;
} else if (!strcmp(value, "host")) {
- vms->gic_version = 0; /* Will probe later */
+ vms->gic_version = VIRT_GIC_VERSION_HOST; /* Will probe later */
} else if (!strcmp(value, "max")) {
- vms->gic_version = -1; /* Will probe later */
+ vms->gic_version = VIRT_GIC_VERSION_MAX; /* Will probe later */
} else {
error_setg(errp, "Invalid gic-version value");
error_append_hint(errp, "Valid values are 3, 2, host, max.\n");
Error **errp)
{
VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
+ const MachineState *ms = MACHINE(hotplug_dev);
const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
- if (is_nvdimm) {
- error_setg(errp, "nvdimm is not yet supported");
- return;
- }
-
if (!vms->acpi_dev) {
error_setg(errp,
"memory hotplug is not enabled: missing acpi-ged device");
return;
}
+ if (is_nvdimm && !ms->nvdimms_state->is_enabled) {
+ error_setg(errp, "nvdimm is not enabled: add 'nvdimm=on' to '-M'");
+ return;
+ }
+
pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), NULL, errp);
}
static void virt_memory_plug(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
- HotplugHandlerClass *hhc;
VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
+ MachineState *ms = MACHINE(hotplug_dev);
+ bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
Error *local_err = NULL;
pc_dimm_plug(PC_DIMM(dev), MACHINE(vms), &local_err);
goto out;
}
- hhc = HOTPLUG_HANDLER_GET_CLASS(vms->acpi_dev);
- hhc->plug(HOTPLUG_HANDLER(vms->acpi_dev), dev, &error_abort);
+ if (is_nvdimm) {
+ nvdimm_plug(ms->nvdimms_state);
+ }
+
+ hotplug_handler_plug(HOTPLUG_HANDLER(vms->acpi_dev),
+ dev, &error_abort);
+
out:
error_propagate(errp, local_err);
}
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
virt_memory_plug(hotplug_dev, dev, errp);
}
+ if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
+ PCIDevice *pdev = PCI_DEVICE(dev);
+
+ vms->iommu = VIRT_IOMMU_VIRTIO;
+ vms->virtio_iommu_bdf = pci_get_bdf(pdev);
+ create_virtio_iommu_dt_bindings(vms);
+ }
}
static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
(object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM))) {
return HOTPLUG_HANDLER(machine);
}
+ if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
+ VirtMachineState *vms = VIRT_MACHINE(machine);
+ if (!vms->bootinfo.firmware_loaded || !virt_is_acpi_enabled(vms)) {
+ return HOTPLUG_HANDLER(machine);
+ }
+ }
return NULL;
}
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM);
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
mc->pci_allow_0_address = true;
hc->plug = virt_machine_device_plug_cb;
hc->unplug_request = virt_machine_device_unplug_request_cb;
mc->numa_mem_supported = true;
+ mc->nvdimm_supported = true;
mc->auto_enable_numa_with_memhp = true;
+ mc->default_ram_id = "mach-virt.ram";
+
+ object_class_property_add(oc, "acpi", "OnOffAuto",
+ virt_get_acpi, virt_set_acpi,
+ NULL, NULL);
+ object_class_property_set_description(oc, "acpi",
+ "Enable ACPI");
}
static void virt_instance_init(Object *obj)
*/
vms->secure = false;
object_property_add_bool(obj, "secure", virt_get_secure,
- virt_set_secure, NULL);
+ virt_set_secure);
object_property_set_description(obj, "secure",
"Set on/off to enable/disable the ARM "
- "Security Extensions (TrustZone)",
- NULL);
+ "Security Extensions (TrustZone)");
/* EL2 is also disabled by default, for similar reasons */
vms->virt = false;
object_property_add_bool(obj, "virtualization", virt_get_virt,
- virt_set_virt, NULL);
+ virt_set_virt);
object_property_set_description(obj, "virtualization",
"Set on/off to enable/disable emulating a "
"guest CPU which implements the ARM "
- "Virtualization Extensions",
- NULL);
+ "Virtualization Extensions");
/* High memory is enabled by default */
vms->highmem = true;
object_property_add_bool(obj, "highmem", virt_get_highmem,
- virt_set_highmem, NULL);
+ virt_set_highmem);
object_property_set_description(obj, "highmem",
"Set on/off to enable/disable using "
- "physical address space above 32 bits",
- NULL);
- /* Default GIC type is v2 */
- vms->gic_version = 2;
+ "physical address space above 32 bits");
+ vms->gic_version = VIRT_GIC_VERSION_NOSEL;
object_property_add_str(obj, "gic-version", virt_get_gic_version,
- virt_set_gic_version, NULL);
+ virt_set_gic_version);
object_property_set_description(obj, "gic-version",
"Set GIC version. "
- "Valid values are 2, 3 and host", NULL);
+ "Valid values are 2, 3, host and max");
vms->highmem_ecam = !vmc->no_highmem_ecam;
/* Default allows ITS instantiation */
vms->its = true;
object_property_add_bool(obj, "its", virt_get_its,
- virt_set_its, NULL);
+ virt_set_its);
object_property_set_description(obj, "its",
"Set on/off to enable/disable "
- "ITS instantiation",
- NULL);
+ "ITS instantiation");
}
/* Default disallows iommu instantiation */
vms->iommu = VIRT_IOMMU_NONE;
- object_property_add_str(obj, "iommu", virt_get_iommu, virt_set_iommu, NULL);
+ object_property_add_str(obj, "iommu", virt_get_iommu, virt_set_iommu);
object_property_set_description(obj, "iommu",
"Set the IOMMU type. "
- "Valid values are none and smmuv3",
- NULL);
+ "Valid values are none and smmuv3");
+
+ /* Default disallows RAS instantiation */
+ vms->ras = false;
+ object_property_add_bool(obj, "ras", virt_get_ras,
+ virt_set_ras);
+ object_property_set_description(obj, "ras",
+ "Set on/off to enable/disable reporting host memory errors "
+ "to a KVM guest using ACPI and guest external abort exceptions");
vms->irqmap = a15irqmap;
}
type_init(machvirt_machine_init);
+static void virt_machine_5_1_options(MachineClass *mc)
+{
+}
+DEFINE_VIRT_MACHINE_AS_LATEST(5, 1)
+
+static void virt_machine_5_0_options(MachineClass *mc)
+{
+ virt_machine_5_1_options(mc);
+}
+DEFINE_VIRT_MACHINE(5, 0)
+
static void virt_machine_4_2_options(MachineClass *mc)
{
+ VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
+
+ virt_machine_5_0_options(mc);
compat_props_add(mc->compat_props, hw_compat_4_2, hw_compat_4_2_len);
+ vmc->kvm_no_adjvtime = true;
}
-DEFINE_VIRT_MACHINE_AS_LATEST(4, 2)
+DEFINE_VIRT_MACHINE(4, 2)
static void virt_machine_4_1_options(MachineClass *mc)
{
projects / mirror_qemu.git / blobdiff