#define CIRRUS_PNPMMIO_SIZE 0x1000
-#define ABS(a) ((signed)(a) > 0 ? a : -a)
-
#define BLTUNSAFE(s) \
( \
( /* check dst is within bounds */ \
memory_region_del_subregion(&s->low_mem_container,
s->cirrus_bank[bank]);
memory_region_destroy(s->cirrus_bank[bank]);
- qemu_free(s->cirrus_bank[bank]);
+ g_free(s->cirrus_bank[bank]);
s->cirrus_bank[bank] = NULL;
}
}
&& !((s->vga.gr[0x0B] & 0x14) == 0x14)
&& !(s->vga.gr[0x0B] & 0x02)) {
- mr = qemu_malloc(sizeof(*mr));
+ mr = g_malloc(sizeof(*mr));
memory_region_init_alias(mr, names[bank], &s->vga.vram,
s->cirrus_bank_base[bank], 0x8000);
memory_region_add_subregion_overlap(
{
CirrusVGAState *s;
- s = qemu_mallocz(sizeof(CirrusVGAState));
+ s = g_malloc0(sizeof(CirrusVGAState));
vga_common_init(&s->vga, VGA_RAM_SIZE);
cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);