+#include "qemu/osdep.h"
#include "ati_int.h"
#ifdef DEBUG_ATI
{"BUS_CNTL", 0x0030},
{"BUS_CNTL1", 0x0034},
{"GEN_INT_CNTL", 0x0040},
+ {"GEN_INT_STATUS", 0x0044},
{"CRTC_GEN_CNTL", 0x0050},
{"CRTC_EXT_CNTL", 0x0054},
{"DAC_CNTL", 0x0058},
+ {"GPIO_VGA_DDC", 0x0060},
+ {"GPIO_DVI_DDC", 0x0064},
{"GPIO_MONID", 0x0068},
{"I2C_CNTL_1", 0x0094},
+ {"AMCGPIO_MASK_MIR", 0x009c},
+ {"AMCGPIO_A_MIR", 0x00a0},
+ {"AMCGPIO_Y_MIR", 0x00a4},
+ {"AMCGPIO_EN_MIR", 0x00a8},
{"PALETTE_INDEX", 0x00b0},
{"PALETTE_DATA", 0x00b4},
{"CNFG_CNTL", 0x00e0},
{"GEN_RESET_CNTL", 0x00f0},
{"CNFG_MEMSIZE", 0x00f8},
+ {"CONFIG_APER_0_BASE", 0x0100},
+ {"CONFIG_APER_1_BASE", 0x0104},
+ {"CONFIG_APER_SIZE", 0x0108},
+ {"CONFIG_REG_1_BASE", 0x010c},
+ {"CONFIG_REG_APER_SIZE", 0x0110},
{"MEM_CNTL", 0x0140},
{"MC_FB_LOCATION", 0x0148},
{"MC_AGP_LOCATION", 0x014C},
{"MC_STATUS", 0x0150},
+ {"MEM_SDRAM_MODE_REG", 0x0158},
{"MEM_POWER_MISC", 0x015c},
{"AGP_BASE", 0x0170},
{"AGP_CNTL", 0x0174},