* This code is licensed under the GNU LGPL
*/
+#include "qemu/osdep.h"
+#include "hw/irq.h"
#include "hw/sysbus.h"
+#include "migration/vmstate.h"
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
+#include "qemu/timer.h"
+#include "qemu/log.h"
+#include "qemu/module.h"
+#include "qom/object.h"
#define PL110_CR_EN 0x001
#define PL110_CR_BGR 0x100
#define PL110_CR_BEBO 0x200
#define PL110_CR_BEPO 0x400
#define PL110_CR_PWR 0x800
+#define PL110_IE_NB 0x004
+#define PL110_IE_VC 0x008
enum pl110_bppmode
{
/* The Versatile/PB uses a slightly modified PL110 controller. */
enum pl110_version
{
- PL110,
- PL110_VERSATILE,
- PL111
+ VERSION_PL110,
+ VERSION_PL110_VERSATILE,
+ VERSION_PL111
};
#define TYPE_PL110 "pl110"
-#define PL110(obj) OBJECT_CHECK(PL110State, (obj), TYPE_PL110)
+typedef struct PL110State PL110State;
+DECLARE_INSTANCE_CHECKER(PL110State, PL110,
+ TYPE_PL110)
-typedef struct PL110State {
+struct PL110State {
SysBusDevice parent_obj;
MemoryRegion iomem;
+ MemoryRegionSection fbsection;
QemuConsole *con;
+ QEMUTimer *vblank_timer;
int version;
uint32_t timing[4];
uint32_t palette[256];
uint32_t raw_palette[128];
qemu_irq irq;
-} PL110State;
+};
static int vmstate_pl110_post_load(void *opaque, int version_id);
static const unsigned char pl110_id[] =
{ 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
-/* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
- has a different ID. However Linux only looks for the normal ID. */
-#if 0
-static const unsigned char pl110_versatile_id[] =
-{ 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
-#else
-#define pl110_versatile_id pl110_id
-#endif
-
static const unsigned char pl111_id[] = {
0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
};
+
/* Indexed by pl110_version */
static const unsigned char *idregs[] = {
pl110_id,
- pl110_versatile_id,
+ /* The ARM documentation (DDI0224C) says the CLCDC on the Versatile board
+ * has a different ID (0x93, 0x10, 0x04, 0x00, ...). However the hardware
+ * itself has the same ID values as a stock PL110, and guests (in
+ * particular Linux) rely on this. We emulate what the hardware does,
+ * rather than what the docs claim it ought to do.
+ */
+ pl110_id,
pl111_id
};
else
bpp_offset = 24;
- if ((s->version != PL111) && (s->bpp == BPP_16)) {
+ if ((s->version != VERSION_PL111) && (s->bpp == BPP_16)) {
/* The PL110's native 16 bit mode is 5551; however
* most boards with a PL110 implement an external
* mux which allows bits to be reshuffled to give
}
dest_width *= s->cols;
first = 0;
- framebuffer_update_display(surface, sysbus_address_space(sbd),
- s->upbase, s->cols, s->rows,
+ if (s->invalidate) {
+ framebuffer_update_memory_section(&s->fbsection,
+ sysbus_address_space(sbd),
+ s->upbase,
+ s->rows, src_width);
+ }
+
+ framebuffer_update_display(surface, &s->fbsection,
+ s->cols, s->rows,
src_width, dest_width, 0,
s->invalidate,
fn, s->palette,
&first, &last);
+
if (first >= 0) {
dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1);
}
/* Update interrupts. */
static void pl110_update(PL110State *s)
{
- /* TODO: Implement interrupts. */
+ /* Raise IRQ if enabled and any status bit is 1 */
+ if (s->int_status & s->int_mask) {
+ qemu_irq_raise(s->irq);
+ } else {
+ qemu_irq_lower(s->irq);
+ }
+}
+
+static void pl110_vblank_interrupt(void *opaque)
+{
+ PL110State *s = opaque;
+
+ /* Fire the vertical compare and next base IRQs and re-arm */
+ s->int_status |= (PL110_IE_NB | PL110_IE_VC);
+ timer_mod(s->vblank_timer,
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+ NANOSECONDS_PER_SECOND / 60);
+ pl110_update(s);
}
static uint64_t pl110_read(void *opaque, hwaddr offset,
case 5: /* LCDLPBASE */
return s->lpbase;
case 6: /* LCDIMSC */
- if (s->version != PL110) {
+ if (s->version != VERSION_PL110) {
return s->cr;
}
return s->int_mask;
case 7: /* LCDControl */
- if (s->version != PL110) {
+ if (s->version != VERSION_PL110) {
return s->int_mask;
}
return s->cr;
s->lpbase = val;
break;
case 6: /* LCDIMSC */
- if (s->version != PL110) {
+ if (s->version != VERSION_PL110) {
goto control;
}
imsc:
pl110_update(s);
break;
case 7: /* LCDControl */
- if (s->version != PL110) {
+ if (s->version != VERSION_PL110) {
goto imsc;
}
control:
s->bpp = (val >> 1) & 7;
if (pl110_enabled(s)) {
qemu_console_resize(s->con, s->cols, s->rows);
+ timer_mod(s->vblank_timer,
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+ NANOSECONDS_PER_SECOND / 60);
+ } else {
+ timer_del(s->vblank_timer);
}
break;
case 10: /* LCDICR */
.gfx_update = pl110_update_display,
};
-static int pl110_initfn(SysBusDevice *sbd)
+static void pl110_realize(DeviceState *dev, Error **errp)
{
- DeviceState *dev = DEVICE(sbd);
PL110State *s = PL110(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
memory_region_init_io(&s->iomem, OBJECT(s), &pl110_ops, s, "pl110", 0x1000);
sysbus_init_mmio(sbd, &s->iomem);
sysbus_init_irq(sbd, &s->irq);
+ s->vblank_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
+ pl110_vblank_interrupt, s);
qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1);
- s->con = graphic_console_init(dev, &pl110_gfx_ops, s);
- return 0;
+ s->con = graphic_console_init(dev, 0, &pl110_gfx_ops, s);
}
static void pl110_init(Object *obj)
{
PL110State *s = PL110(obj);
- s->version = PL110;
+ s->version = VERSION_PL110;
}
static void pl110_versatile_init(Object *obj)
{
PL110State *s = PL110(obj);
- s->version = PL110_VERSATILE;
+ s->version = VERSION_PL110_VERSATILE;
}
static void pl111_init(Object *obj)
{
PL110State *s = PL110(obj);
- s->version = PL111;
+ s->version = VERSION_PL111;
}
static void pl110_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = pl110_initfn;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
- dc->no_user = 1;
dc->vmsd = &vmstate_pl110;
+ dc->realize = pl110_realize;
}
static const TypeInfo pl110_info = {
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