* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
+
#include "qemu/osdep.h"
+#include "qemu/module.h"
+#include "qemu/units.h"
#include "qapi/error.h"
-#include "hw/hw.h"
+#include "qemu/log.h"
#include "hw/loader.h"
#include "trace.h"
-#include "ui/console.h"
-#include "ui/vnc.h"
#include "hw/pci/pci.h"
+#include "hw/qdev-properties.h"
+#include "migration/vmstate.h"
+#include "qom/object.h"
#undef VERBOSE
#define HW_RECT_ACCEL
#define TYPE_VMWARE_SVGA "vmware-svga"
-#define VMWARE_SVGA(obj) \
- OBJECT_CHECK(struct pci_vmsvga_state_s, (obj), TYPE_VMWARE_SVGA)
+DECLARE_INSTANCE_CHECKER(struct pci_vmsvga_state_s, VMWARE_SVGA,
+ TYPE_VMWARE_SVGA)
struct pci_vmsvga_state_s {
/*< private >*/
/* These values can probably be changed arbitrarily. */
#define SVGA_SCRATCH_SIZE 0x8000
-#define SVGA_MAX_WIDTH ROUND_UP(2360, VNC_DIRTY_PIXELS_PER_BIT)
+#define SVGA_MAX_WIDTH 2368
#define SVGA_MAX_HEIGHT 1770
#ifdef VERBOSE
s->fifo_next >= SVGA_FIFO_SIZE) {
return 0;
}
- if (s->fifo_max < s->fifo_min + 10 * 1024) {
+ if (s->fifo_max < s->fifo_min + 10 * KiB) {
return 0;
}
ret = s->scratch[s->index - SVGA_SCRATCH_BASE];
break;
}
- printf("%s: Bad register %02x\n", __func__, s->index);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad register %02x\n", __func__, s->index);
ret = 0;
break;
}
s->new_width = value;
s->invalidated = 1;
} else {
- printf("%s: Bad width: %i\n", __func__, value);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad width: %i\n", __func__, value);
}
break;
s->new_height = value;
s->invalidated = 1;
} else {
- printf("%s: Bad height: %i\n", __func__, value);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad height: %i\n", __func__, value);
}
break;
case SVGA_REG_BITS_PER_PIXEL:
if (value != 32) {
- printf("%s: Bad bits per pixel: %i bits\n", __func__, value);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad bits per pixel: %i bits\n", __func__, value);
s->config = 0;
s->invalidated = 1;
}
s->scratch[s->index - SVGA_SCRATCH_BASE] = value;
break;
}
- printf("%s: Bad register %02x\n", __func__, s->index);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad register %02x\n", __func__, s->index);
}
}
static void vmsvga_update_display(void *opaque)
{
struct vmsvga_state_s *s = opaque;
- DisplaySurface *surface;
if (!s->enable || !s->config) {
/* in standard vga mode */
}
vmsvga_check_size(s);
- surface = qemu_console_surface(s->vga.con);
vmsvga_fifo_run(s);
vmsvga_update_rect_flush(s);
if (s->invalidated) {
s->invalidated = 0;
- dpy_gfx_update(s->vga.con, 0, 0,
- surface_width(surface), surface_height(surface));
+ dpy_gfx_update_full(s->vga.con);
}
}
&error_fatal);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
- vga_common_init(&s->vga, OBJECT(dev), true);
+ vga_common_init(&s->vga, OBJECT(dev));
vga_init(&s->vga, OBJECT(dev), address_space, io, true);
vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
s->new_depth = 32;
dev->config[PCI_LATENCY_TIMER] = 0x40;
dev->config[PCI_INTERRUPT_LINE] = 0xff; /* End */
- memory_region_init_io(&s->io_bar, NULL, &vmsvga_io_ops, &s->chip,
+ memory_region_init_io(&s->io_bar, OBJECT(dev), &vmsvga_io_ops, &s->chip,
"vmsvga-io", 0x10);
memory_region_set_flush_coalesced(&s->io_bar);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
&s->chip.vga.vram);
pci_register_bar(dev, 2, PCI_BASE_ADDRESS_MEM_PREFETCH,
&s->chip.fifo_ram);
-
- if (!dev->rom_bar) {
- /* compatibility with pc-0.13 and older */
- vga_init_vbe(&s->chip.vga, OBJECT(dev), pci_address_space(dev));
- }
}
static Property vga_vmware_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s,
chip.vga.vram_size_mb, 16),
+ DEFINE_PROP_BOOL("global-vmstate", struct pci_vmsvga_state_s,
+ chip.vga.global_vmstate, false),
DEFINE_PROP_END_OF_LIST(),
};
k->subsystem_id = SVGA_PCI_DEVICE_ID;
dc->reset = vmsvga_reset;
dc->vmsd = &vmstate_vmware_vga;
- dc->props = vga_vmware_properties;
+ device_class_set_props(dc, vga_vmware_properties);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
}