#include "hw/pci-host/q35.h"
#include "exec/address-spaces.h"
#include "hw/i386/ich9.h"
+#include "hw/i386/smbios.h"
#include "hw/ide/pci.h"
#include "hw/ide/ahci.h"
#include "hw/usb.h"
#include "hw/cpu/icc_bus.h"
+#include "qemu/error-report.h"
/* ICH9 AHCI has 6 ports */
#define MAX_SATA_PORTS 6
-static bool has_pvpanic;
-static bool has_pci_info = true;
+static bool has_pci_info;
+static bool has_acpi_build = true;
+static bool smbios_defaults = true;
+static bool smbios_legacy_mode;
+/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
+ * host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
+ * pages in the host.
+ */
+static bool gigabyte_align = true;
+static bool has_reserved_memory = true;
/* PC hardware initialisation */
-static void pc_q35_init(QEMUMachineInitArgs *args)
+static void pc_q35_init(MachineState *machine)
{
+ PCMachineState *pc_machine = PC_MACHINE(machine);
ram_addr_t below_4g_mem_size, above_4g_mem_size;
Q35PCIHost *q35_host;
PCIHostState *phb;
PCIDevice *ahci;
DeviceState *icc_bridge;
PcGuestInfo *guest_info;
+ ram_addr_t lowmem;
+
+ /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
+ * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
+ * also known as MMCFG).
+ * If it doesn't, we need to split it in chunks below and above 4G.
+ * In any case, try to make sure that guest addresses aligned at
+ * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
+ * For old machine types, use whatever split we used historically to avoid
+ * breaking migration.
+ */
+ if (machine->ram_size >= 0xb0000000) {
+ lowmem = gigabyte_align ? 0x80000000 : 0xb0000000;
+ } else {
+ lowmem = 0xb0000000;
+ }
- if (xen_enabled() && xen_hvm_init(&ram_memory) != 0) {
+ /* Handle the machine opt max-ram-below-4g. It is basicly doing
+ * min(qemu limit, user limit).
+ */
+ if (lowmem > pc_machine->max_ram_below_4g) {
+ lowmem = pc_machine->max_ram_below_4g;
+ if (machine->ram_size - lowmem > lowmem &&
+ lowmem & ((1ULL << 30) - 1)) {
+ error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
+ ") not a multiple of 1G; possible bad performance.",
+ pc_machine->max_ram_below_4g);
+ }
+ }
+
+ if (machine->ram_size >= lowmem) {
+ above_4g_mem_size = machine->ram_size - lowmem;
+ below_4g_mem_size = lowmem;
+ } else {
+ above_4g_mem_size = 0;
+ below_4g_mem_size = machine->ram_size;
+ }
+
+ if (xen_enabled() && xen_hvm_init(&below_4g_mem_size, &above_4g_mem_size,
+ &ram_memory) != 0) {
fprintf(stderr, "xen hardware virtual machine initialisation failed\n");
exit(1);
}
object_property_add_child(qdev_get_machine(), "icc-bridge",
OBJECT(icc_bridge), NULL);
- pc_cpus_init(args->cpu_model, icc_bridge);
+ pc_cpus_init(machine->cpu_model, icc_bridge);
pc_acpi_init("q35-acpi-dsdt.aml");
kvmclock_create();
- if (args->ram_size >= 0xb0000000) {
- above_4g_mem_size = args->ram_size - 0xb0000000;
- below_4g_mem_size = 0xb0000000;
- } else {
- above_4g_mem_size = 0;
- below_4g_mem_size = args->ram_size;
- }
-
/* pci enabled */
if (pci_enabled) {
pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, NULL, "pci", INT64_MAX);
+ memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
rom_memory = pci_memory;
} else {
pci_memory = NULL;
guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size);
guest_info->has_pci_info = has_pci_info;
guest_info->isapc_ram_fw = false;
+ guest_info->has_acpi_build = has_acpi_build;
+ guest_info->has_reserved_memory = has_reserved_memory;
+
+ if (smbios_defaults) {
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
+ /* These values are guest ABI, do not change */
+ smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
+ mc->name, smbios_legacy_mode);
+ }
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
- pc_memory_init(get_system_memory(),
- args->kernel_filename, args->kernel_cmdline,
- args->initrd_filename,
+ pc_memory_init(machine, get_system_memory(),
below_4g_mem_size, above_4g_mem_size,
rom_memory, &ram_memory, guest_info);
}
lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
ICH9_LPC_FUNC), true,
TYPE_ICH9_LPC_DEVICE);
+
+ object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
+ TYPE_HOTPLUG_HANDLER,
+ (Object **)&pc_machine->acpi_dev,
+ object_property_allow_set_link,
+ OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
+ object_property_set_link(OBJECT(machine), OBJECT(lpc),
+ PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
+
ich9_lpc = ICH9_LPC_DEVICE(lpc);
ich9_lpc->pic = gsi;
ich9_lpc->ioapic = gsi_state->ioapic_irq;
pc_register_ferr_irq(gsi[13]);
/* init basic PC hardware */
- pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false);
+ pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false, 0xff0104);
/* connect pm stuff to lpc */
ich9_lpc_pm_init(lpc);
0xb100),
8, NULL, 0);
- pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_order,
+ pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order,
floppy, idebus[0], idebus[1], rtc_state);
/* the rest devices to which pci devfn is automatically assigned */
if (pci_enabled) {
pc_pci_device_init(host_bus);
}
+}
- if (has_pvpanic) {
- pvpanic_init(isa_bus);
- }
+static void pc_compat_2_0(MachineState *machine)
+{
+ smbios_legacy_mode = true;
+ has_reserved_memory = false;
+}
+
+static void pc_compat_1_7(MachineState *machine)
+{
+ pc_compat_2_0(machine);
+ smbios_defaults = false;
+ gigabyte_align = false;
+ option_rom_has_mr = true;
+ x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC);
}
-static void pc_compat_1_6(QEMUMachineInitArgs *args)
+static void pc_compat_1_6(MachineState *machine)
{
+ pc_compat_1_7(machine);
has_pci_info = false;
- rom_file_in_ram = false;
+ rom_file_has_mr = false;
+ has_acpi_build = false;
}
-static void pc_compat_1_5(QEMUMachineInitArgs *args)
+static void pc_compat_1_5(MachineState *machine)
{
- pc_compat_1_6(args);
- has_pvpanic = true;
+ pc_compat_1_6(machine);
}
-static void pc_compat_1_4(QEMUMachineInitArgs *args)
+static void pc_compat_1_4(MachineState *machine)
{
- pc_compat_1_5(args);
- has_pvpanic = false;
+ pc_compat_1_5(machine);
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
-static void pc_q35_init_1_6(QEMUMachineInitArgs *args)
+static void pc_q35_init_2_0(MachineState *machine)
{
- pc_compat_1_6(args);
- pc_q35_init(args);
+ pc_compat_2_0(machine);
+ pc_q35_init(machine);
}
-static void pc_q35_init_1_5(QEMUMachineInitArgs *args)
+static void pc_q35_init_1_7(MachineState *machine)
{
- pc_compat_1_5(args);
- pc_q35_init(args);
+ pc_compat_1_7(machine);
+ pc_q35_init(machine);
}
-static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
+static void pc_q35_init_1_6(MachineState *machine)
{
- pc_compat_1_4(args);
- pc_q35_init(args);
+ pc_compat_1_6(machine);
+ pc_q35_init(machine);
+}
+
+static void pc_q35_init_1_5(MachineState *machine)
+{
+ pc_compat_1_5(machine);
+ pc_q35_init(machine);
+}
+
+static void pc_q35_init_1_4(MachineState *machine)
+{
+ pc_compat_1_4(machine);
+ pc_q35_init(machine);
}
#define PC_Q35_MACHINE_OPTIONS \
.desc = "Standard PC (Q35 + ICH9, 2009)", \
.hot_add_cpu = pc_hot_add_cpu
+#define PC_Q35_2_1_MACHINE_OPTIONS \
+ PC_Q35_MACHINE_OPTIONS, \
+ .default_machine_opts = "firmware=bios-256k.bin"
+
+static QEMUMachine pc_q35_machine_v2_1 = {
+ PC_Q35_2_1_MACHINE_OPTIONS,
+ .name = "pc-q35-2.1",
+ .alias = "q35",
+ .init = pc_q35_init,
+};
+
+#define PC_Q35_2_0_MACHINE_OPTIONS PC_Q35_2_1_MACHINE_OPTIONS
+
+static QEMUMachine pc_q35_machine_v2_0 = {
+ PC_Q35_2_0_MACHINE_OPTIONS,
+ .name = "pc-q35-2.0",
+ .init = pc_q35_init_2_0,
+ .compat_props = (GlobalProperty[]) {
+ PC_COMPAT_2_0,
+ { /* end of list */ }
+ },
+};
+
#define PC_Q35_1_7_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
static QEMUMachine pc_q35_machine_v1_7 = {
PC_Q35_1_7_MACHINE_OPTIONS,
.name = "pc-q35-1.7",
- .alias = "q35",
- .init = pc_q35_init,
+ .init = pc_q35_init_1_7,
+ .compat_props = (GlobalProperty[]) {
+ PC_COMPAT_1_7,
+ { /* end of list */ }
+ },
};
#define PC_Q35_1_6_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
static void pc_q35_machine_init(void)
{
- qemu_register_machine(&pc_q35_machine_v1_7);
- qemu_register_machine(&pc_q35_machine_v1_6);
- qemu_register_machine(&pc_q35_machine_v1_5);
- qemu_register_machine(&pc_q35_machine_v1_4);
+ qemu_register_pc_machine(&pc_q35_machine_v2_1);
+ qemu_register_pc_machine(&pc_q35_machine_v2_0);
+ qemu_register_pc_machine(&pc_q35_machine_v1_7);
+ qemu_register_pc_machine(&pc_q35_machine_v1_6);
+ qemu_register_pc_machine(&pc_q35_machine_v1_5);
+ qemu_register_pc_machine(&pc_q35_machine_v1_4);
}
machine_init(pc_q35_machine_init);
projects / mirror_qemu.git / blobdiff