* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
- * version 2 of the License, or (at your option) any later version.
+ * version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
dma_memory_unmap(as, *ptr, len, DMA_DIRECTION_FROM_DEVICE, len);
}
- *ptr = dma_memory_map(as, addr, &len, DMA_DIRECTION_FROM_DEVICE);
- if (len < wanted) {
+ *ptr = dma_memory_map(as, addr, &len, DMA_DIRECTION_FROM_DEVICE,
+ MEMTXATTRS_UNSPECIFIED);
+ if (len < wanted && *ptr) {
dma_memory_unmap(as, *ptr, len, DMA_DIRECTION_FROM_DEVICE, len);
*ptr = NULL;
}
/* Only aligned reads are allowed on AHCI */
if (addr & 3) {
- fprintf(stderr, "ahci: Mis-aligned write to addr 0x"
- TARGET_FMT_plx "\n", addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "ahci: Mis-aligned write to addr 0x%03" HWADDR_PRIX "\n",
+ addr);
return;
}
}
/* Buffer pretty output based on a raw FIS structure. */
-static char *ahci_pretty_buffer_fis(uint8_t *fis, int cmd_len)
+static char *ahci_pretty_buffer_fis(const uint8_t *fis, int cmd_len)
{
int i;
GString *s = g_string_new("FIS:");
/* map PRDT */
if (!(prdt = dma_memory_map(ad->hba->as, prdt_addr, &prdt_len,
- DMA_DIRECTION_TO_DEVICE))){
+ DMA_DIRECTION_TO_DEVICE,
+ MEMTXATTRS_UNSPECIFIED))){
trace_ahci_populate_sglist_no_map(ad->hba, ad->port_no);
return -1;
}
}
-static void process_ncq_command(AHCIState *s, int port, uint8_t *cmd_fis,
+static void process_ncq_command(AHCIState *s, int port, const uint8_t *cmd_fis,
uint8_t slot)
{
AHCIDevice *ad = &s->dev[port];
- NCQFrame *ncq_fis = (NCQFrame*)cmd_fis;
+ const NCQFrame *ncq_fis = (NCQFrame *)cmd_fis;
uint8_t tag = ncq_fis->tag >> 3;
NCQTransferState *ncq_tfs = &ad->ncq_tfs[tag];
size_t size;
g_assert(is_ncq(ncq_fis->command));
if (ncq_tfs->used) {
/* error - already in use */
- fprintf(stderr, "%s: tag %d already used\n", __func__, tag);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: tag %d already used\n",
+ __func__, tag);
return;
}
if (!ncq_tfs->sector_count) {
ncq_tfs->sector_count = 0x10000;
}
- size = ncq_tfs->sector_count * 512;
+ size = ncq_tfs->sector_count * BDRV_SECTOR_SIZE;
ahci_populate_sglist(ad, &ncq_tfs->sglist, ncq_tfs->cmdh, size, 0);
if (ncq_tfs->sglist.size < size) {
- error_report("ahci: PRDT length for NCQ command (0x%zx) "
+ error_report("ahci: PRDT length for NCQ command (0x" DMA_ADDR_FMT ") "
"is smaller than the requested size (0x%zx)",
ncq_tfs->sglist.size, size);
ncq_err(ncq_tfs);
}
static void handle_reg_h2d_fis(AHCIState *s, int port,
- uint8_t slot, uint8_t *cmd_fis)
+ uint8_t slot, const uint8_t *cmd_fis)
{
IDEState *ide_state = &s->dev[port].port.ifs[0];
AHCICmdHdr *cmd = get_cmd_header(s, port, slot);
tbl_addr = le64_to_cpu(cmd->tbl_addr);
cmd_len = 0x80;
cmd_fis = dma_memory_map(s->as, tbl_addr, &cmd_len,
- DMA_DIRECTION_FROM_DEVICE);
+ DMA_DIRECTION_TO_DEVICE, MEMTXATTRS_UNSPECIFIED);
if (!cmd_fis) {
trace_handle_cmd_badfis(s, port);
return -1;
}
out:
- dma_memory_unmap(s->as, cmd_fis, cmd_len, DMA_DIRECTION_FROM_DEVICE,
+ dma_memory_unmap(s->as, cmd_fis, cmd_len, DMA_DIRECTION_TO_DEVICE,
cmd_len);
if (s->dev[port].port.ifs[0].status & (BUSY_STAT|DRQ_STAT)) {
has_sglist ? "" : "o");
if (has_sglist && size) {
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
+
if (is_write) {
- dma_buf_write(s->data_ptr, size, &s->sg);
+ dma_buf_write(s->data_ptr, size, NULL, &s->sg, attrs);
} else {
- dma_buf_read(s->data_ptr, size, &s->sg);
+ dma_buf_read(s->data_ptr, size, NULL, &s->sg, attrs);
}
}
}
if (is_write) {
- dma_buf_read(p, l, &s->sg);
+ dma_buf_read(p, l, NULL, &s->sg, MEMTXATTRS_UNSPECIFIED);
} else {
- dma_buf_write(p, l, &s->sg);
+ dma_buf_write(p, l, NULL, &s->sg, MEMTXATTRS_UNSPECIFIED);
}
/* free sglist, update byte count */
for (i = 0; i < s->ports; i++) {
AHCIDevice *ad = &s->dev[i];
- ide_bus_new(&ad->port, sizeof(ad->port), qdev, i, 1);
+ ide_bus_init(&ad->port, sizeof(ad->port), qdev, i, 1);
ide_init2(&ad->port, irqs[i]);
ad->hba = s;
return -1;
}
ahci_populate_sglist(ncq_tfs->drive, &ncq_tfs->sglist,
- ncq_tfs->cmdh, ncq_tfs->sector_count * 512,
+ ncq_tfs->cmdh,
+ ncq_tfs->sector_count * BDRV_SECTOR_SIZE,
0);
if (ncq_tfs->sector_count != ncq_tfs->sglist.size >> 9) {
return -1;
int32_t ahci_get_num_ports(PCIDevice *dev)
{
- AHCIPCIState *d = ICH_AHCI(dev);
+ AHCIPCIState *d = ICH9_AHCI(dev);
AHCIState *ahci = &d->ahci;
return ahci->ports;
void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd)
{
- AHCIPCIState *d = ICH_AHCI(dev);
+ AHCIPCIState *d = ICH9_AHCI(dev);
AHCIState *ahci = &d->ahci;
int i;