*/
#include "qemu/osdep.h"
#include "hw/hw.h"
-#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
-#include "hw/isa/isa.h"
-#include "sysemu/block-backend.h"
#include "sysemu/dma.h"
#include "qemu/error-report.h"
#include "hw/ide/pci.h"
(IDE_RETRY_DMA | IDE_RETRY_PIO | \
IDE_RETRY_READ | IDE_RETRY_FLUSH)
+static uint64_t pci_ide_cmd_read(void *opaque, hwaddr addr, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (addr != 2 || size != 1) {
+ return ((uint64_t)1 << (size * 8)) - 1;
+ }
+ return ide_status_read(bus, addr + 2);
+}
+
+static void pci_ide_cmd_write(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (addr != 2 || size != 1) {
+ return;
+ }
+ ide_cmd_write(bus, addr + 2, data);
+}
+
+const MemoryRegionOps pci_ide_cmd_le_ops = {
+ .read = pci_ide_cmd_read,
+ .write = pci_ide_cmd_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static uint64_t pci_ide_data_read(void *opaque, hwaddr addr, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (size == 1) {
+ return ide_ioport_read(bus, addr);
+ } else if (addr == 0) {
+ if (size == 2) {
+ return ide_data_readw(bus, addr);
+ } else {
+ return ide_data_readl(bus, addr);
+ }
+ }
+ return ((uint64_t)1 << (size * 8)) - 1;
+}
+
+static void pci_ide_data_write(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (size == 1) {
+ ide_ioport_write(bus, addr, data);
+ } else if (addr == 0) {
+ if (size == 2) {
+ ide_data_writew(bus, addr, data);
+ } else {
+ ide_data_writel(bus, addr, data);
+ }
+ }
+}
+
+const MemoryRegionOps pci_ide_data_le_ops = {
+ .read = pci_ide_data_read,
+ .write = pci_ide_data_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
static void bmdma_start_dma(IDEDMA *dma, IDEState *s,
BlockCompletionFunc *dma_cb)
{
return ((bm->status & abused_bits) != 0);
}
-static void ide_bmdma_pre_save(void *opaque)
+static int ide_bmdma_pre_save(void *opaque)
{
BMDMAState *bm = opaque;
uint8_t abused_bits = BM_MIGRATION_COMPAT_STATUS_BITS;
bm->migration_retry_nsector = bm->bus->retry_nsector;
bm->migration_compat_status =
(bm->status & ~abused_bits) | (bm->bus->error_status & abused_bits);
+
+ return 0;
}
/* This function accesses bm->bus->error_status which is loaded only after
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIIDEState),
.abstract = true,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void pci_ide_register_types(void)