#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "qemu-common.h"
#include "cpu.h"
-#include "hw/hw.h"
#include "trace.h"
#include "qemu/timer.h"
#include "hw/ppc/xics.h"
+#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
+#include "qemu/module.h"
#include "qapi/visitor.h"
+#include "migration/vmstate.h"
#include "monitor/monitor.h"
#include "hw/intc/intc.h"
+#include "hw/irq.h"
+#include "sysemu/kvm.h"
+#include "sysemu/reset.h"
void icp_pic_print_info(ICPState *icp, Monitor *mon)
{
- ICPStateClass *icpc = ICP_GET_CLASS(icp);
int cpu_index = icp->cs ? icp->cs->cpu_index : -1;
if (!icp->output) {
return;
}
- if (icpc->synchronize_state) {
- icpc->synchronize_state(icp);
+ if (kvm_irqchip_in_kernel()) {
+ icp_synchronize_state(icp);
}
monitor_printf(mon, "CPU %d XIRR=%08x (%p) PP=%02x MFRR=%02x\n",
void ics_pic_print_info(ICSState *ics, Monitor *mon)
{
- ICSStateClass *icsc = ICS_BASE_GET_CLASS(ics);
uint32_t i;
monitor_printf(mon, "ICS %4x..%4x %p\n",
return;
}
- if (icsc->synchronize_state) {
- icsc->synchronize_state(ics);
+ if (kvm_irqchip_in_kernel()) {
+ ics_synchronize_state(ics);
}
for (i = 0; i < ics->nr_irqs; i++) {
}
}
-static int icp_dispatch_pre_save(void *opaque)
+static int icp_pre_save(void *opaque)
{
ICPState *icp = opaque;
- ICPStateClass *info = ICP_GET_CLASS(icp);
- if (info->pre_save) {
- info->pre_save(icp);
+ if (kvm_irqchip_in_kernel()) {
+ icp_get_kvm_state(icp);
}
return 0;
}
-static int icp_dispatch_post_load(void *opaque, int version_id)
+static int icp_post_load(void *opaque, int version_id)
{
ICPState *icp = opaque;
- ICPStateClass *info = ICP_GET_CLASS(icp);
- if (info->post_load) {
- return info->post_load(icp, version_id);
+ if (kvm_irqchip_in_kernel()) {
+ Error *local_err = NULL;
+ int ret;
+
+ ret = icp_set_kvm_state(icp, &local_err);
+ if (ret < 0) {
+ error_report_err(local_err);
+ return ret;
+ }
}
return 0;
.name = "icp/server",
.version_id = 1,
.minimum_version_id = 1,
- .pre_save = icp_dispatch_pre_save,
- .post_load = icp_dispatch_post_load,
+ .pre_save = icp_pre_save,
+ .post_load = icp_post_load,
.fields = (VMStateField[]) {
/* Sanity check */
VMSTATE_UINT32(xirr, ICPState),
},
};
-static void icp_reset(DeviceState *dev)
+static void icp_reset_handler(void *dev)
{
ICPState *icp = ICP(dev);
/* Make all outputs are deasserted */
qemu_set_irq(icp->output, 0);
-}
-static void icp_reset_handler(void *dev)
-{
- DeviceClass *dc = DEVICE_GET_CLASS(dev);
+ if (kvm_irqchip_in_kernel()) {
+ Error *local_err = NULL;
- dc->reset(dev);
+ icp_set_kvm_state(ICP(dev), &local_err);
+ if (local_err) {
+ error_report_err(local_err);
+ }
+ }
}
static void icp_realize(DeviceState *dev, Error **errp)
case PPC_FLAGS_INPUT_POWER7:
icp->output = env->irq_inputs[POWER7_INPUT_INT];
break;
+ case PPC_FLAGS_INPUT_POWER9: /* For SPAPR xics emulation */
+ icp->output = env->irq_inputs[POWER9_INPUT_INT];
+ break;
case PPC_FLAGS_INPUT_970:
icp->output = env->irq_inputs[PPC970_INPUT_INT];
return;
}
+ /* Connect the presenter to the VCPU (required for CPU hotplug) */
+ if (kvm_irqchip_in_kernel()) {
+ icp_kvm_realize(dev, &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ }
+
qemu_register_reset(icp_reset_handler, dev);
vmstate_register(NULL, icp->cs->cpu_index, &vmstate_icp_server, icp);
}
dc->realize = icp_realize;
dc->unrealize = icp_unrealize;
- dc->reset = icp_reset;
}
static const TypeInfo icp_info = {
{
ICSState *ics = (ICSState *)opaque;
+ if (kvm_irqchip_in_kernel()) {
+ ics_kvm_set_irq(ics, srcno, val);
+ return;
+ }
+
if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_LSI) {
ics_simple_set_irq_lsi(ics, srcno, val);
} else {
ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
icsc->parent_reset(dev);
+
+ if (kvm_irqchip_in_kernel()) {
+ Error *local_err = NULL;
+
+ ics_set_kvm_state(ICS_BASE(dev), &local_err);
+ if (local_err) {
+ error_report_err(local_err);
+ }
+ }
}
static void ics_simple_reset_handler(void *dev)
.class_size = sizeof(ICSStateClass),
};
+static void ics_reset_irq(ICSIRQState *irq)
+{
+ irq->priority = 0xff;
+ irq->saved_priority = 0xff;
+}
+
static void ics_base_reset(DeviceState *dev)
{
ICSState *ics = ICS_BASE(dev);
memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
for (i = 0; i < ics->nr_irqs; i++) {
- ics->irqs[i].priority = 0xff;
- ics->irqs[i].saved_priority = 0xff;
+ ics_reset_irq(ics->irqs + i);
ics->irqs[i].flags = flags[i];
}
}
ics->offset = XICS_IRQ_BASE;
}
-static int ics_base_dispatch_pre_save(void *opaque)
+static int ics_base_pre_save(void *opaque)
{
ICSState *ics = opaque;
- ICSStateClass *info = ICS_BASE_GET_CLASS(ics);
- if (info->pre_save) {
- info->pre_save(ics);
+ if (kvm_irqchip_in_kernel()) {
+ ics_get_kvm_state(ics);
}
return 0;
}
-static int ics_base_dispatch_post_load(void *opaque, int version_id)
+static int ics_base_post_load(void *opaque, int version_id)
{
ICSState *ics = opaque;
- ICSStateClass *info = ICS_BASE_GET_CLASS(ics);
- if (info->post_load) {
- return info->post_load(ics, version_id);
+ if (kvm_irqchip_in_kernel()) {
+ Error *local_err = NULL;
+ int ret;
+
+ ret = ics_set_kvm_state(ics, &local_err);
+ if (ret < 0) {
+ error_report_err(local_err);
+ return ret;
+ }
}
return 0;
.name = "ics",
.version_id = 1,
.minimum_version_id = 1,
- .pre_save = ics_base_dispatch_pre_save,
- .post_load = ics_base_dispatch_post_load,
+ .pre_save = ics_base_pre_save,
+ .post_load = ics_base_post_load,
.fields = (VMStateField[]) {
/* Sanity check */
VMSTATE_UINT32_EQUAL(nr_irqs, ICSState, NULL),
ics->irqs[srcno].flags |=
lsi ? XICS_FLAGS_IRQ_LSI : XICS_FLAGS_IRQ_MSI;
+
+ if (kvm_irqchip_in_kernel()) {
+ Error *local_err = NULL;
+
+ ics_reset_irq(ics->irqs + srcno);
+ ics_set_kvm_state_one(ics, srcno, &local_err);
+ if (local_err) {
+ error_report_err(local_err);
+ }
+ }
}
static void xics_register_types(void)