#include "qemu/osdep.h"
#include "qemu/units.h"
-#include "qemu-common.h"
#include "qemu/datadir.h"
#include "sysemu/sysemu.h"
#include "cpu.h"
#include "hw/boards.h"
#include "hw/or-irq.h"
+#include "hw/nmi.h"
#include "elf.h"
#include "hw/loader.h"
#include "ui/console.h"
uint8_t ipr;
uint8_t auxmode;
qemu_irq irqs[1];
+ QEMUTimer *nmi_release;
};
#define GLUE_IRQ_IN_VIA1 0
#define GLUE_IRQ_IN_VIA2 1
#define GLUE_IRQ_IN_SONIC 2
#define GLUE_IRQ_IN_ESCC 3
+#define GLUE_IRQ_IN_NMI 4
#define GLUE_IRQ_NUBUS_9 0
irq = 3;
break;
+ case GLUE_IRQ_IN_NMI:
+ irq = 6;
+ break;
+
default:
g_assert_not_reached();
}
irq = 3;
break;
+ case GLUE_IRQ_IN_NMI:
+ irq = 6;
+ break;
+
default:
g_assert_not_reached();
}
s->auxmode = level;
}
+static void glue_nmi(NMIState *n, int cpu_index, Error **errp)
+{
+ GLUEState *s = GLUE(n);
+
+ /* Hold NMI active for 100ms */
+ GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 1);
+ timer_mod(s->nmi_release, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 100);
+}
+
+static void glue_nmi_release(void *opaque)
+{
+ GLUEState *s = GLUE(opaque);
+
+ GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 0);
+}
+
static void glue_reset(DeviceState *dev)
{
GLUEState *s = GLUE(dev);
s->ipr = 0;
s->auxmode = 0;
+
+ timer_del(s->nmi_release);
}
static const VMStateDescription vmstate_glue = {
.fields = (VMStateField[]) {
VMSTATE_UINT8(ipr, GLUEState),
VMSTATE_UINT8(auxmode, GLUEState),
+ VMSTATE_TIMER_PTR(nmi_release, GLUEState),
VMSTATE_END_OF_LIST(),
},
};
DEFINE_PROP_END_OF_LIST(),
};
+static void glue_finalize(Object *obj)
+{
+ GLUEState *s = GLUE(obj);
+
+ timer_free(s->nmi_release);
+}
+
static void glue_init(Object *obj)
{
DeviceState *dev = DEVICE(obj);
qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1);
qdev_init_gpio_out(dev, s->irqs, 1);
+
+ /* NMI release timer */
+ s->nmi_release = timer_new_ms(QEMU_CLOCK_VIRTUAL, glue_nmi_release, s);
}
static void glue_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ NMIClass *nc = NMI_CLASS(klass);
dc->vmsd = &vmstate_glue;
dc->reset = glue_reset;
device_class_set_props(dc, glue_properties);
+ nc->nmi_monitor_handler = glue_nmi;
}
static const TypeInfo glue_info = {
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(GLUEState),
.instance_init = glue_init,
+ .instance_finalize = glue_finalize,
.class_init = glue_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_NMI },
+ { }
+ },
};
static void main_cpu_reset(void *opaque)
sysbus = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(sysbus, &error_fatal);
- sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(via2_dev,
- VIA2_IRQ_SCSI_BIT));
- sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(via2_dev,
- VIA2_IRQ_SCSI_DATA_BIT));
+ /* SCSI and SCSI data IRQs are negative edge triggered */
+ sysbus_connect_irq(sysbus, 0, qemu_irq_invert(qdev_get_gpio_in(via2_dev,
+ VIA2_IRQ_SCSI_BIT)));
+ sysbus_connect_irq(sysbus, 1, qemu_irq_invert(qdev_get_gpio_in(via2_dev,
+ VIA2_IRQ_SCSI_DATA_BIT)));
sysbus_mmio_map(sysbus, 0, ESP_BASE);
sysbus_mmio_map(sysbus, 1, ESP_PDMA);
qdev_prop_set_uint32(dev, "width", graphic_width);
qdev_prop_set_uint32(dev, "height", graphic_height);
qdev_prop_set_uint8(dev, "depth", graphic_depth);
- if (graphic_width == 1152 && graphic_height == 870 && graphic_depth == 8) {
+ if (graphic_width == 1152 && graphic_height == 870) {
qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR);
} else {
qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA);
/* Remove qtest_enabled() check once firmware files are in the tree */
if (!qtest_enabled()) {
- if (bios_size < 0 || bios_size > MACROM_SIZE) {
+ if (bios_size <= 0 || bios_size > MACROM_SIZE) {
error_report("could not load MacROM '%s'", bios_name);
exit(1);
}
- ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE);
+ ptr = rom_ptr(MACROM_ADDR, bios_size);
+ assert(ptr != NULL);
stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */
stl_phys(cs->as, 4,
MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */