qemu_set_irq(s->irq, (s->isr & s->imr) != 0);
}
-uint64_t mcf_uart_read(void *opaque, target_phys_addr_t addr,
+uint64_t mcf_uart_read(void *opaque, hwaddr addr,
unsigned size)
{
mcf_uart_state *s = (mcf_uart_state *)opaque;
}
}
-void mcf_uart_write(void *opaque, target_phys_addr_t addr,
+void mcf_uart_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
mcf_uart_state *s = (mcf_uart_state *)opaque;
};
void mcf_uart_mm_init(MemoryRegion *sysmem,
- target_phys_addr_t base,
+ hwaddr base,
qemu_irq irq,
CharDriverState *chr)
{