#ifndef QEMU_HW_MILKYMIST_H
#define QEMU_HW_MILKYMIST_H
-#include "qdev.h"
-#include "qdev-addr.h"
+#include "hw/qdev.h"
+#include "hw/qdev-addr.h"
+#include "net/net.h"
static inline DeviceState *milkymist_uart_create(hwaddr base,
qemu_irq irq)
dev = qdev_create(NULL, "milkymist-uart");
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
}
dev = qdev_create(NULL, "milkymist-hpdmc");
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}
dev = qdev_create(NULL, "milkymist-memcard");
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}
qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}
qdev_prop_set_uint32(dev, "capabilities", capabilities);
qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, gpio_irq);
- sysbus_connect_irq(sysbus_from_qdev(dev), 1, timer0_irq);
- sysbus_connect_irq(sysbus_from_qdev(dev), 2, timer1_irq);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);
return dev;
}
dev = qdev_create(NULL, "milkymist-pfpu");
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
}
-#ifdef CONFIG_OPENGL
+#ifdef CONFIG_GLX
#include <X11/Xlib.h>
#include <GL/glx.h>
static const int glx_fbconfig_attr[] = {
static inline DeviceState *milkymist_tmu2_create(hwaddr base,
qemu_irq irq)
{
-#ifdef CONFIG_OPENGL
+#ifdef CONFIG_GLX
DeviceState *dev;
Display *d;
GLXFBConfig *configs;
dev = qdev_create(NULL, "milkymist-tmu2");
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
#else
dev = qdev_create(NULL, "milkymist-ac97");
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, crrequest_irq);
- sysbus_connect_irq(sysbus_from_qdev(dev), 1, crreply_irq);
- sysbus_connect_irq(sysbus_from_qdev(dev), 2, dmar_irq);
- sysbus_connect_irq(sysbus_from_qdev(dev), 3, dmaw_irq);
-
- return dev;
-}
-
-static inline DeviceState *milkymist_minimac_create(hwaddr base,
- qemu_irq rx_irq, qemu_irq tx_irq)
-{
- DeviceState *dev;
-
- qemu_check_nic_model(&nd_table[0], "minimac");
- dev = qdev_create(NULL, "milkymist-minimac");
- qdev_set_nic_properties(dev, &nd_table[0]);
- qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
- sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);
return dev;
}
qemu_check_nic_model(&nd_table[0], "minimac2");
dev = qdev_create(NULL, "milkymist-minimac2");
- qdev_prop_set_taddr(dev, "buffers_base", buffers_base);
qdev_set_nic_properties(dev, &nd_table[0]);
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
- sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);
return dev;
}
qdev_prop_set_uint32(dev, "dmem_base", dmem_base);
qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
qdev_init_nofail(dev);
- sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
}