find -type f | xargs sed -i 's/[\t ]$//g' # on most files

[mirror_qemu.git] / hw / mips_malta.c

diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 21eb75faf721cba4573df89ed069b82f747bb93c..ab4d3fdd4dc4b4e09cfbcdf98ee2ca3214115e2d 100644 (file)
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -42,7 +42,6 @@
 #define ENVP_NB_ENTRIES                16
 #define ENVP_ENTRY_SIZE                256
 
-
 extern FILE *logfile;
 
 typedef struct {
@@ -70,7 +69,7 @@ static void malta_fpga_update_display(void *opaque)
     for (i = 7 ; i >= 0 ; i--) {
         if (s->leds & (1 << i))
             leds_text[i] = '#';
-       else
+        else
             leds_text[i] = ' ';
     }
     leds_text[8] = '\0';
@@ -511,9 +510,9 @@ static void write_bootloader (CPUState *env, unsigned long bios_offset, int64_t
     stl_raw(p++, 0x00000000);                                      /* nop */
 
     /* YAMON service vector */
-    stl_raw(phys_ram_base + bios_offset + 0x500, 0xbfc00580);      /* start: */                                        
+    stl_raw(phys_ram_base + bios_offset + 0x500, 0xbfc00580);      /* start: */                                
     stl_raw(phys_ram_base + bios_offset + 0x504, 0xbfc0083c);      /* print_count: */
-    stl_raw(phys_ram_base + bios_offset + 0x520, 0xbfc00580);      /* start: */                                        
+    stl_raw(phys_ram_base + bios_offset + 0x520, 0xbfc00580);      /* start: */                                
     stl_raw(phys_ram_base + bios_offset + 0x52c, 0xbfc00800);      /* flush_cache: */
     stl_raw(phys_ram_base + bios_offset + 0x534, 0xbfc00808);      /* print: */
     stl_raw(phys_ram_base + bios_offset + 0x538, 0xbfc00800);      /* reg_cpu_isr: */
@@ -539,6 +538,15 @@ static void write_bootloader (CPUState *env, unsigned long bios_offset, int64_t
     stl_raw(p++, 0x34e70000 | (env->ram_size & 0xffff));           /* ori a3, a3, low(env->ram_size) */
 
     /* Load BAR registers as done by YAMON */
+    stl_raw(p++, 0x3c09b400);                                      /* lui t1, 0xb400 */
+
+#ifdef TARGET_WORDS_BIGENDIAN
+    stl_raw(p++, 0x3c08df00);                                      /* lui t0, 0xdf00 */
+#else
+    stl_raw(p++, 0x340800df);                                      /* ori t0, r0, 0x00df */
+#endif
+    stl_raw(p++, 0xad280068);                                      /* sw t0, 0x0068(t1) */
+
     stl_raw(p++, 0x3c09bbe0);                                      /* lui t1, 0xbbe0 */
 
 #ifdef TARGET_WORDS_BIGENDIAN
@@ -778,9 +786,35 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device,
     cpu_register_physical_memory(0x1fc00000LL,
                                  BIOS_SIZE, bios_offset | IO_MEM_ROM);
 
-    /* Load a BIOS image except if a kernel image has been specified. In
-       the later case, just write a small bootloader to the flash
-       location. */
+    /* FPGA */
+    malta_fpga = malta_fpga_init(0x1f000000LL, env);
+
+    /* Load a BIOS image unless a kernel image has been specified. */
+    if (!kernel_filename) {
+        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
+        ret = load_image(buf, phys_ram_base + bios_offset);
+        if (ret < 0 || ret > BIOS_SIZE) {
+            fprintf(stderr,
+                    "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
+                    buf);
+            exit(1);
+        }
+        /* In little endian mode the 32bit words in the bios are swapped,
+           a neat trick which allows bi-endian firmware. */
+#ifndef TARGET_WORDS_BIGENDIAN
+        {
+            uint32_t *addr;
+            for (addr = (uint32_t *)(phys_ram_base + bios_offset);
+                 addr < (uint32_t *)(phys_ram_base + bios_offset + ret);
+                addr++) {
+                *addr = bswap32(*addr);
+            }
+        }
+#endif
+    }
+
+    /* If a kernel image has been specified, write a small bootloader
+       to the flash location. */
     if (kernel_filename) {
         env->ram_size = ram_size;
         env->kernel_filename = kernel_filename;
@@ -789,14 +823,6 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device,
         kernel_entry = load_kernel(env);
         env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
         write_bootloader(env, bios_offset, kernel_entry);
-    } else {
-        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
-        ret = load_image(buf, phys_ram_base + bios_offset);
-        if (ret < 0 || ret > BIOS_SIZE) {
-            fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
-                    buf);
-            exit(1);
-        }
     }
 
     /* Board ID = 0x420 (Malta Board with CoreLV)
@@ -809,9 +835,6 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device,
     cpu_mips_clock_init(env);
     cpu_mips_irqctrl_init();
 
-    /* FPGA */
-    malta_fpga = malta_fpga_init(0x1f000000LL, env);
-
     /* Interrupt controller */
     /* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */
     i8259 = i8259_init(env->irq[2]);