+/*
+ * QEMU/MIPS pseudo-board
+ *
+ * emulates a simple machine with ISA-like bus.
+ * ISA IO space mapped to the 0x14000000 (PHYS) and
+ * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
+ * All peripherial devices are attached to this "bus" with
+ * the standard PC ISA addresses.
+*/
#include "vl.h"
-#define DEBUG_IRQ_COUNT
-
+#ifdef TARGET_WORDS_BIGENDIAN
#define BIOS_FILENAME "mips_bios.bin"
-//#define BIOS_FILENAME "system.bin"
-#define KERNEL_LOAD_ADDR 0x80010000
-#define INITRD_LOAD_ADDR 0x80800000
-
-/* MIPS R4K IRQ controler */
-#if defined(DEBUG_IRQ_COUNT)
-static uint64_t irq_count[16];
+#else
+#define BIOS_FILENAME "mipsel_bios.bin"
#endif
-extern FILE *logfile;
-
-void mips_set_irq (int n_IRQ, int level)
-{
- uint32_t mask;
-
- if (n_IRQ < 0 || n_IRQ >= 8)
- return;
- mask = 0x100 << n_IRQ;
- if (level != 0) {
-#if 1
- if (logfile) {
- fprintf(logfile, "%s n %d l %d mask %08x %08x\n",
- __func__, n_IRQ, level, mask, cpu_single_env->CP0_Status);
- }
-#endif
- cpu_single_env->CP0_Cause |= mask;
- if ((cpu_single_env->CP0_Status & 0x00000001) &&
- (cpu_single_env->CP0_Status & mask)) {
-#if defined(DEBUG_IRQ_COUNT)
- irq_count[n_IRQ]++;
-#endif
-#if 1
- if (logfile)
- fprintf(logfile, "%s raise IRQ\n", __func__);
-#endif
- cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
- }
- } else {
- cpu_single_env->CP0_Cause &= ~mask;
- }
-}
-
-void pic_set_irq (int n_IRQ, int level)
-{
- mips_set_irq(n_IRQ + 2, level);
-}
-
-void pic_info (void)
-{
- term_printf("IRQ asserted: %02x mask: %02x\n",
- (cpu_single_env->CP0_Cause >> 8) & 0xFF,
- (cpu_single_env->CP0_Status >> 8) & 0xFF);
-}
-
-void irq_info (void)
-{
-#if !defined(DEBUG_IRQ_COUNT)
- term_printf("irq statistic code not compiled.\n");
+#ifdef TARGET_MIPS64
+#define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
#else
- int i;
- int64_t count;
-
- term_printf("IRQ statistics:\n");
- for (i = 0; i < 8; i++) {
- count = irq_count[i];
- if (count > 0)
- term_printf("%2d: %lld\n", i, count);
- }
+#define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
#endif
-}
-void cpu_mips_irqctrl_init (void)
-{
-}
+#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
-/* MIPS R4K timer */
-uint32_t cpu_mips_get_random (CPUState *env)
-{
- uint64_t now = qemu_get_clock(vm_clock);
+static const int ide_iobase[2] = { 0x1f0, 0x170 };
+static const int ide_iobase2[2] = { 0x3f6, 0x376 };
+static const int ide_irq[2] = { 14, 15 };
- return (uint32_t)now & 0x0000000F;
-}
+static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
+static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
-uint32_t cpu_mips_get_count (CPUState *env)
-{
- return env->CP0_Count +
- (uint32_t)muldiv64(qemu_get_clock(vm_clock),
- 100 * 1000 * 1000, ticks_per_sec);
-}
+extern FILE *logfile;
-static void cpu_mips_update_count (CPUState *env, uint32_t count,
- uint32_t compare)
-{
- uint64_t now, next;
- uint32_t tmp;
-
- tmp = count;
- if (count == compare)
- tmp++;
- now = qemu_get_clock(vm_clock);
- next = now + muldiv64(compare - tmp, ticks_per_sec, 100 * 1000 * 1000);
- if (next == now)
- next++;
-#if 1
- if (logfile) {
- fprintf(logfile, "%s: 0x%08llx %08x %08x => 0x%08llx\n",
- __func__, now, count, compare, next - now);
- }
-#endif
- /* Store new count and compare registers */
- env->CP0_Compare = compare;
- env->CP0_Count =
- count - (uint32_t)muldiv64(now, 100 * 1000 * 1000, ticks_per_sec);
- /* Adjust timer */
- qemu_mod_timer(env->timer, next);
-}
+static PITState *pit; /* PIT i8254 */
-void cpu_mips_store_count (CPUState *env, uint32_t value)
+/*i8254 PIT is attached to the IRQ0 at PIC i8259 */
+
+static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
+ uint32_t val)
{
- cpu_mips_update_count(env, value, env->CP0_Compare);
+ if ((addr & 0xffff) == 0 && val == 42)
+ qemu_system_reset_request ();
+ else if ((addr & 0xffff) == 4 && val == 42)
+ qemu_system_shutdown_request ();
}
-void cpu_mips_store_compare (CPUState *env, uint32_t value)
+static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
{
- cpu_mips_update_count(env, cpu_mips_get_count(env), value);
- pic_set_irq(5, 0);
+ return 0;
}
-static void mips_timer_cb (void *opaque)
-{
- CPUState *env;
+static CPUWriteMemoryFunc *mips_qemu_write[] = {
+ &mips_qemu_writel,
+ &mips_qemu_writel,
+ &mips_qemu_writel,
+};
- env = opaque;
-#if 1
- if (logfile) {
- fprintf(logfile, "%s\n", __func__);
- }
-#endif
- cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare);
- pic_set_irq(5, 1);
-}
+static CPUReadMemoryFunc *mips_qemu_read[] = {
+ &mips_qemu_readl,
+ &mips_qemu_readl,
+ &mips_qemu_readl,
+};
-void cpu_mips_clock_init (CPUState *env)
-{
- env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
- env->CP0_Compare = 0;
- cpu_mips_update_count(env, 1, 0);
-}
+static int mips_qemu_iomemtype = 0;
-static void io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
+ const char *kernel_cmdline,
+ const char *initrd_filename)
{
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
- cpu_outb(NULL, addr & 0xffff, value);
-}
+ int64_t entry, kernel_low, kernel_high;
+ long kernel_size, initrd_size;
+ ram_addr_t initrd_offset;
-static uint32_t io_readb (void *opaque, target_phys_addr_t addr)
-{
- uint32_t ret = cpu_inb(NULL, addr & 0xffff);
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
- return ret;
-}
+ kernel_size = load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND,
+ &entry, &kernel_low, &kernel_high);
+ if (kernel_size >= 0) {
+ if ((entry & ~0x7fffffffULL) == 0x80000000)
+ entry = (int32_t)entry;
+ env->PC[env->current_tc] = entry;
+ } else {
+ fprintf(stderr, "qemu: could not load kernel '%s'\n",
+ kernel_filename);
+ exit(1);
+ }
-static void io_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
-{
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap16(value);
-#endif
- cpu_outw(NULL, addr & 0xffff, value);
-}
+ /* load initrd */
+ initrd_size = 0;
+ initrd_offset = 0;
+ if (initrd_filename) {
+ initrd_size = get_image_size (initrd_filename);
+ if (initrd_size > 0) {
+ initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
+ if (initrd_offset + initrd_size > ram_size) {
+ fprintf(stderr,
+ "qemu: memory too small for initial ram disk '%s'\n",
+ initrd_filename);
+ exit(1);
+ }
+ initrd_size = load_image(initrd_filename,
+ phys_ram_base + initrd_offset);
+ }
+ if (initrd_size == (target_ulong) -1) {
+ fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
+ initrd_filename);
+ exit(1);
+ }
+ }
-static uint32_t io_readw (void *opaque, target_phys_addr_t addr)
-{
- uint32_t ret = cpu_inw(NULL, addr & 0xffff);
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap16(ret);
-#endif
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
- return ret;
-}
+ /* Store command line. */
+ if (initrd_size > 0) {
+ int ret;
+ ret = sprintf(phys_ram_base + (16 << 20) - 256,
+ "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
+ PHYS_TO_VIRT((uint32_t)initrd_offset),
+ initrd_size);
+ strcpy (phys_ram_base + (16 << 20) - 256 + ret, kernel_cmdline);
+ }
+ else {
+ strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
+ }
-static void io_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
-{
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
- cpu_outl(NULL, addr & 0xffff, value);
+ *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
+ *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
}
-static uint32_t io_readl (void *opaque, target_phys_addr_t addr)
+static void main_cpu_reset(void *opaque)
{
- uint32_t ret = cpu_inl(NULL, addr & 0xffff);
+ CPUState *env = opaque;
+ cpu_reset(env);
+ cpu_mips_register(env, NULL);
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap32(ret);
-#endif
- if (logfile)
- fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
- return ret;
+ if (env->kernel_filename)
+ load_kernel (env, env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename);
}
-CPUWriteMemoryFunc *io_write[] = {
- &io_writeb,
- &io_writew,
- &io_writel,
-};
-
-CPUReadMemoryFunc *io_read[] = {
- &io_readb,
- &io_readw,
- &io_readl,
-};
-
+static
void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
DisplayState *ds, const char **fd_filename, int snapshot,
const char *kernel_filename, const char *kernel_cmdline,
- const char *initrd_filename)
+ const char *initrd_filename, const char *cpu_model)
{
char buf[1024];
- target_ulong kernel_base, kernel_size, initrd_base, initrd_size;
unsigned long bios_offset;
- int io_memory;
- int linux_boot;
- int ret;
+ int bios_size;
+ CPUState *env;
+ RTCState *rtc_state;
+ int i;
+ mips_def_t *def;
+ qemu_irq *i8259;
+
+ /* init CPUs */
+ if (cpu_model == NULL) {
+#ifdef TARGET_MIPS64
+ cpu_model = "R4000";
+#else
+ cpu_model = "24Kf";
+#endif
+ }
+ if (mips_find_by_name(cpu_model, &def) != 0)
+ def = NULL;
+ env = cpu_init();
+ cpu_mips_register(env, def);
+ register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
+ qemu_register_reset(main_cpu_reset, env);
- printf("%s: start\n", __func__);
- linux_boot = (kernel_filename != NULL);
/* allocate RAM */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+
+ if (!mips_qemu_iomemtype) {
+ mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
+ mips_qemu_write, NULL);
+ }
+ cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
+
+ /* Try to load a BIOS image. If this fails, we continue regardless,
+ but initialize the hardware ourselves. When a kernel gets
+ preloaded we also initialize the hardware, since the BIOS wasn't
+ run. */
bios_offset = ram_size + vga_ram_size;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
- printf("%s: load BIOS '%s' size %d\n", __func__, buf, BIOS_SIZE);
- ret = load_image(buf, phys_ram_base + bios_offset);
- if (ret != BIOS_SIZE) {
- fprintf(stderr, "qemu: could not load MIPS bios '%s'\n", buf);
- exit(1);
+ bios_size = load_image(buf, phys_ram_base + bios_offset);
+ if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
+ cpu_register_physical_memory(0x1fc00000,
+ BIOS_SIZE, bios_offset | IO_MEM_ROM);
+ } else {
+ /* not fatal */
+ fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
+ buf);
}
- cpu_register_physical_memory((uint32_t)(0x1fc00000),
- BIOS_SIZE, bios_offset | IO_MEM_ROM);
-#if 0
- memcpy(phys_ram_base + 0x10000, phys_ram_base + bios_offset, BIOS_SIZE);
- cpu_single_env->PC = 0x80010004;
-#else
- cpu_single_env->PC = 0xBFC00004;
-#endif
- if (linux_boot) {
- kernel_base = KERNEL_LOAD_ADDR;
- /* now we can load the kernel */
- kernel_size = load_image(kernel_filename,
- phys_ram_base + (kernel_base - 0x80000000));
- if (kernel_size == (target_ulong) -1) {
- fprintf(stderr, "qemu: could not load kernel '%s'\n",
- kernel_filename);
- exit(1);
+
+ if (kernel_filename) {
+ load_kernel (env, ram_size, kernel_filename, kernel_cmdline,
+ initrd_filename);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ }
+
+ /* Init CPU internal devices */
+ cpu_mips_irq_init_cpu(env);
+ cpu_mips_clock_init(env);
+ cpu_mips_irqctrl_init();
+
+ /* The PIC is attached to the MIPS CPU INT0 pin */
+ i8259 = i8259_init(env->irq[2]);
+
+ rtc_state = rtc_init(0x70, i8259[8]);
+
+ /* Register 64 KB of ISA IO space at 0x14000000 */
+ isa_mmio_init(0x14000000, 0x00010000);
+ isa_mem_base = 0x10000000;
+
+ pit = pit_init(0x40, i8259[0]);
+
+ for(i = 0; i < MAX_SERIAL_PORTS; i++) {
+ if (serial_hds[i]) {
+ serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
}
- /* load initrd */
- if (initrd_filename) {
- initrd_base = INITRD_LOAD_ADDR;
- initrd_size = load_image(initrd_filename,
- phys_ram_base + initrd_base);
- if (initrd_size == (target_ulong) -1) {
- fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
- initrd_filename);
- exit(1);
- }
+ }
+
+ isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
+ vga_ram_size);
+
+ if (nd_table[0].vlan) {
+ if (nd_table[0].model == NULL
+ || strcmp(nd_table[0].model, "ne2k_isa") == 0) {
+ isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
+ } else if (strcmp(nd_table[0].model, "?") == 0) {
+ fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");
+ exit (1);
} else {
- initrd_base = 0;
- initrd_size = 0;
+ fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
+ exit (1);
}
- cpu_single_env->PC = KERNEL_LOAD_ADDR;
- } else {
- kernel_base = 0;
- kernel_size = 0;
- initrd_base = 0;
- initrd_size = 0;
}
- /* XXX: should not be ! */
- printf("%s: init VGA\n", __func__);
- vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size,
- vga_ram_size);
-
- /* Init internal devices */
- cpu_mips_clock_init(cpu_single_env);
- cpu_mips_irqctrl_init();
+ for(i = 0; i < 2; i++)
+ isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
+ bs_table[2 * i], bs_table[2 * i + 1]);
- isa_mem_base = 0x78000000;
- /* Register 64 KB of ISA IO space at random address */
- io_memory = cpu_register_io_memory(0, io_read, io_write, NULL);
- cpu_register_physical_memory(0x70000000, 0x00010000, io_memory);
- serial_init(0x3f8, 4, serial_hds[0]);
- printf("%s: done\n", __func__);
+ i8042_init(i8259[1], i8259[12], 0x60);
+ ds1225y_init(0x9000, "nvram");
}
QEMUMachine mips_machine = {
projects / mirror_qemu.git / blobdiff