hw/misc: Introduce a model of Xilinx Versal's CFRAME_REG

[mirror_qemu.git] / hw / misc / meson.build

diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 3135697d7422b3e99e90b12d3dd780cc172ae7bf..88ecab839237db5b3cd8a857fdd384cd78f5d7d5 100644 (file)
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -100,6 +100,7 @@ system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files(
   'xlnx-versal-pmc-iou-slcr.c',
   'xlnx-versal-cfu.c',
   'xlnx-cfi-if.c',
+  'xlnx-versal-cframe-reg.c',
 ))
 system_ss.add(when: 'CONFIG_STM32F2XX_SYSCFG', if_true: files('stm32f2xx_syscfg.c'))
 system_ss.add(when: 'CONFIG_STM32F4XX_SYSCFG', if_true: files('stm32f4xx_syscfg.c'))