*
* CE, WP and R/B are active low.
*/
-void nand_setpins(struct nand_flash_s *s,
+void nand_setpins(struct nand_flash_s *s,
int cle, int ale, int ce, int wp, int gnd)
{
s->cle = cle;
uint8_t nand_getio(struct nand_flash_s *s)
{
int offset;
-
+
/* Allow sequential reading */
if (!s->iolen && s->cmd == NAND_CMD_READ0) {
offset = (s->addr & ((1 << s->addr_shift) - 1)) + s->offset;