* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu-common.h"
#include "devices.h"
#include "flash.h"
#include "hw.h"
+#include "bt.h"
+#include "loader.h"
/* Nokia N8x0 support */
struct n800_s {
struct {
void *opaque;
uint32_t (*txrx)(void *opaque, uint32_t value, int len);
- struct uwire_slave_s *chip;
+ uWireSlave *chip;
} ts;
i2c_bus *i2c;
int keymap[0x80];
i2c_slave *kbd;
- struct tusb_s *usb;
+ TUSBState *usb;
void *retu;
void *tahvo;
+ void *nand;
};
/* GPIO pins */
#define N8X0_TMP105_GPIO 125
/* Config */
+#define BT_UART 0
#define XLDR_LL_UART 1
/* Addresses on the I2C bus 0 */
#define N8X0_USB_ASYNC_CS 1
#define N8X0_USB_SYNC_CS 4
+#define N8X0_BD_ADDR 0x00, 0x1a, 0x89, 0x9e, 0x3e, 0x81
+
static void n800_mmc_cs_cb(void *opaque, int line, int level)
{
/* TODO: this seems to actually be connected to the menelaus, to
qemu_irq_lower(omap2_gpio_in_get(s->cpu->gpif, N800_BAT_COVER_GPIO)[0]);
}
+#define MAEMO_CAL_HEADER(...) \
+ 'C', 'o', 'n', 'F', 0x02, 0x00, 0x04, 0x00, \
+ __VA_ARGS__, \
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+static const uint8_t n8x0_cal_wlan_mac[] = {
+ MAEMO_CAL_HEADER('w', 'l', 'a', 'n', '-', 'm', 'a', 'c')
+ 0x1c, 0x00, 0x00, 0x00, 0x47, 0xd6, 0x69, 0xb3,
+ 0x30, 0x08, 0xa0, 0x83, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x1a, 0x00, 0x00, 0x00,
+ 0x89, 0x00, 0x00, 0x00, 0x9e, 0x00, 0x00, 0x00,
+ 0x5d, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00,
+};
+
+static const uint8_t n8x0_cal_bt_id[] = {
+ MAEMO_CAL_HEADER('b', 't', '-', 'i', 'd', 0, 0, 0)
+ 0x0a, 0x00, 0x00, 0x00, 0xa3, 0x4b, 0xf6, 0x96,
+ 0xa8, 0xeb, 0xb2, 0x41, 0x00, 0x00, 0x00, 0x00,
+ N8X0_BD_ADDR,
+};
+
static void n8x0_nand_setup(struct n800_s *s)
{
+ char *otp_region;
+
/* Either ec40xx or ec48xx are OK for the ID */
omap_gpmc_attach(s->cpu->gpmc, N8X0_ONENAND_CS, 0, onenand_base_update,
onenand_base_unmap,
- onenand_init(0xec4800, 1,
- omap2_gpio_in_get(s->cpu->gpif,
- N8X0_ONENAND_GPIO)[0]));
+ (s->nand = onenand_init(0xec4800, 1,
+ omap2_gpio_in_get(s->cpu->gpif,
+ N8X0_ONENAND_GPIO)[0])));
+ otp_region = onenand_raw_otp(s->nand);
+
+ memcpy(otp_region + 0x000, n8x0_cal_wlan_mac, sizeof(n8x0_cal_wlan_mac));
+ memcpy(otp_region + 0x800, n8x0_cal_bt_id, sizeof(n8x0_cal_bt_id));
+ /* XXX: in theory should also update the OOB for both pages */
}
static void n8x0_i2c_setup(struct n800_s *s)
{
+ DeviceState *dev;
qemu_irq tmp_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TMP105_GPIO)[0];
/* Attach the CPU on one end of our I2C bus. */
s->i2c = omap_i2c_bus(s->cpu->i2c[0]);
/* Attach a menelaus PM chip */
- i2c_set_slave_address(
- twl92230_init(s->i2c,
- s->cpu->irq[0][OMAP_INT_24XX_SYS_NIRQ]),
- N8X0_MENELAUS_ADDR);
+ dev = i2c_create_slave(s->i2c, "twl92230", N8X0_MENELAUS_ADDR);
+ qdev_connect_gpio_out(dev, 3, s->cpu->irq[0][OMAP_INT_24XX_SYS_NIRQ]);
/* Attach a TMP105 PM chip (A0 wired to ground) */
- i2c_set_slave_address(tmp105_init(s->i2c, tmp_irq), N8X0_TMP105_ADDR);
+ dev = i2c_create_slave(s->i2c, "tmp105", N8X0_TMP105_ADDR);
+ qdev_connect_gpio_out(dev, 0, tmp_irq);
}
/* Touchscreen and keypad controller */
-static struct mouse_transform_info_s n800_pointercal = {
+static MouseTransformInfo n800_pointercal = {
.x = 800,
.y = 480,
.a = { 14560, -68, -3455208, -39, -9621, 35152972, 65536 },
};
-static struct mouse_transform_info_s n810_pointercal = {
+static MouseTransformInfo n810_pointercal = {
.x = 800,
.y = 480,
.a = { 15041, 148, -4731056, 171, -10238, 35933380, 65536 },
/* XXX: are the three pins inverted inside the chip between the
* tsc and the cpu (N4111)? */
- qemu_irq penirq = 0; /* NC */
+ qemu_irq penirq = NULL; /* NC */
qemu_irq kbirq = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_KP_IRQ_GPIO)[0];
qemu_irq dav = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_TS_GPIO)[0];
- s->ts.chip = tsc2301_init(penirq, kbirq, dav, 0);
+ s->ts.chip = tsc2301_init(penirq, kbirq, dav);
s->ts.opaque = s->ts.chip->opaque;
s->ts.txrx = tsc210x_txrx;
static void n810_kbd_setup(struct n800_s *s)
{
qemu_irq kbd_irq = omap2_gpio_in_get(s->cpu->gpif, N810_KEYBOARD_GPIO)[0];
+ DeviceState *dev;
int i;
for (i = 0; i < 0x80; i ++)
/* Attach the LM8322 keyboard to the I2C bus,
* should happen in n8x0_i2c_setup and s->kbd be initialised here. */
- s->kbd = lm8323_init(s->i2c, kbd_irq);
- i2c_set_slave_address(s->kbd, N810_LM8323_ADDR);
+ dev = i2c_create_slave(s->i2c, "lm8323", N810_LM8323_ADDR);
+ qdev_connect_gpio_out(dev, 0, kbd_irq);
}
/* LCD MIPI DBI-C controller (URAL) */
uint8_t ret;
if (len > 9)
- cpu_abort(cpu_single_env, "%s: FIXME: bad SPI word width %i\n",
- __FUNCTION__, len);
+ hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
- if (s->p >= sizeof(s->resp) / sizeof(*s->resp))
+ if (s->p >= ARRAY_SIZE(s->resp))
ret = 0;
else
ret = s->resp[s->p ++];
fb_blank = memset(qemu_malloc(800 * 480 * 2), 0xff, 800 * 480 * 2);
/* Display Memory Data Port */
chip->block(chip->opaque, 1, fb_blank, 800 * 480 * 2, 800);
- free(fb_blank);
+ qemu_free(fb_blank);
}
-static void n8x0_dss_setup(struct n800_s *s, DisplayState *ds)
+static void n8x0_dss_setup(struct n800_s *s)
{
- s->blizzard.opaque = s1d13745_init(0, ds);
+ s->blizzard.opaque = s1d13745_init(NULL);
s->blizzard.block = s1d13745_write_block;
s->blizzard.write = s1d13745_write;
s->blizzard.read = s1d13745_read;
qemu_irq retu_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_RETU_GPIO)[0];
qemu_irq tahvo_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TAHVO_GPIO)[0];
- struct cbus_s *cbus = cbus_init(dat_out);
+ CBus *cbus = cbus_init(dat_out);
omap2_gpio_out_set(s->cpu->gpif, N8X0_CBUS_CLK_GPIO, cbus->clk);
omap2_gpio_out_set(s->cpu->gpif, N8X0_CBUS_DAT_GPIO, cbus->dat);
cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1));
}
+static void n8x0_uart_setup(struct n800_s *s)
+{
+ CharDriverState *radio = uart_hci_init(
+ omap2_gpio_in_get(s->cpu->gpif,
+ N8X0_BT_HOST_WKUP_GPIO)[0]);
+
+ omap2_gpio_out_set(s->cpu->gpif, N8X0_BT_RESET_GPIO,
+ csrhci_pins_get(radio)[csrhci_pin_reset]);
+ omap2_gpio_out_set(s->cpu->gpif, N8X0_BT_WKUP_GPIO,
+ csrhci_pins_get(radio)[csrhci_pin_wakeup]);
+
+ omap_uart_attach(s->cpu->uart[BT_UART], radio);
+}
+
static void n8x0_usb_power_cb(void *opaque, int line, int level)
{
struct n800_s *s = opaque;
{
qemu_irq tusb_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TUSB_INT_GPIO)[0];
qemu_irq tusb_pwr = qemu_allocate_irqs(n8x0_usb_power_cb, s, 1)[0];
- struct tusb_s *tusb = tusb6010_init(tusb_irq);
+ TUSBState *tusb = tusb6010_init(tusb_irq);
/* Using the NOR interface */
omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_ASYNC_CS,
- tusb6010_async_io(tusb), 0, 0, tusb);
+ tusb6010_async_io(tusb), NULL, NULL, tusb);
omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_SYNC_CS,
- tusb6010_sync_io(tusb), 0, 0, tusb);
+ tusb6010_sync_io(tusb), NULL, NULL, tusb);
s->usb = tusb;
omap2_gpio_out_set(s->cpu->gpif, N8X0_TUSB_ENABLE_GPIO, tusb_pwr);
/* OMAP STI console? Pin out settings? */
ADD_TAG(0x6e01, 414);
- for (i = 0; i < sizeof(n800_pinout) / 4; i ++)
+ for (i = 0; i < ARRAY_SIZE(n800_pinout); i ++)
stl_raw(v ++, n800_pinout[i]);
/* Kernel memsize? */
"headphone", N8X0_HEADPHONE_GPIO,
OMAP_GPIOSW_TYPE_CONNECTION | OMAP_GPIOSW_INVERTED,
},
- { 0 }
+ { NULL }
}, n810_gpiosw_info[] = {
{
"gps_reset", N810_GPS_RESET_GPIO,
"slide", N810_SLIDE_GPIO,
OMAP_GPIOSW_TYPE_COVER | OMAP_GPIOSW_INVERTED,
},
- { 0 }
+ { NULL }
};
static struct omap_partition_info_s {
{ 0x00280000, 0x00200000, 0x3, "initfs" },
{ 0x00480000, 0x0fb80000, 0x3, "rootfs" },
- { 0, 0, 0, 0 }
+ { 0, 0, 0, NULL }
}, n810_part_info[] = {
{ 0x00000000, 0x00020000, 0x3, "bootloader" },
{ 0x00020000, 0x00060000, 0x0, "config" },
{ 0x002a0000, 0x00400000, 0x0, "initfs" },
{ 0x006a0000, 0x0f960000, 0x0, "rootfs" },
- { 0, 0, 0, 0 }
+ { 0, 0, 0, NULL }
};
+static bdaddr_t n8x0_bd_addr = {{ N8X0_BD_ADDR }};
+
static int n8x0_atag_setup(void *p, int model)
{
uint8_t *b;
#if 0
stw_raw(w ++, OMAP_TAG_SERIAL_CONSOLE); /* u16 tag */
stw_raw(w ++, 4); /* u16 len */
- stw_raw(w ++, XLDR_LL_UART); /* u8 console_uart */
+ stw_raw(w ++, XLDR_LL_UART + 1); /* u8 console_uart */
stw_raw(w ++, 115200); /* u32 console_speed */
#endif
stb_raw(b ++, N8X0_BT_WKUP_GPIO); /* u8 bt_wakeup_gpio */
stb_raw(b ++, N8X0_BT_HOST_WKUP_GPIO); /* u8 host_wakeup_gpio */
stb_raw(b ++, N8X0_BT_RESET_GPIO); /* u8 reset_gpio */
- stb_raw(b ++, 1); /* u8 bt_uart */
- memset(b, 0, 6); /* u8 bd_addr[6] */
+ stb_raw(b ++, BT_UART + 1); /* u8 bt_uart */
+ memcpy(b, &n8x0_bd_addr, 6); /* u8 bd_addr[6] */
b += 6;
stb_raw(b ++, 0x02); /* u8 bt_sysclk (38.4) */
w = (void *) b;
}
static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline, const char *initrd_filename,
const char *cpu_model, struct arm_boot_info *binfo, int model)
{
struct n800_s *s = (struct n800_s *) qemu_mallocz(sizeof(*s));
int sdram_size = binfo->ram_size;
- int onenandram_size = 0x00010000;
-
- if (ram_size < sdram_size + onenandram_size + OMAP242X_SRAM_SIZE) {
- fprintf(stderr, "This architecture uses %i bytes of memory\n",
- sdram_size + onenandram_size + OMAP242X_SRAM_SIZE);
- exit(1);
- }
+ DisplayState *ds;
- s->cpu = omap2420_mpu_init(sdram_size, NULL, cpu_model);
+ s->cpu = omap2420_mpu_init(sdram_size, cpu_model);
/* Setup peripherals
*
n810_kbd_setup(s);
}
n8x0_spi_setup(s);
- n8x0_dss_setup(s, ds);
+ n8x0_dss_setup(s);
n8x0_cbus_setup(s);
+ n8x0_uart_setup(s);
if (usb_enabled)
n8x0_usb_setup(s);
}
if (option_rom[0] && (boot_device[0] == 'n' || !kernel_filename)) {
+ int rom_size;
+ uint8_t nolo_tags[0x10000];
/* No, wait, better start at the ROM. */
s->cpu->env->regs[15] = OMAP2_Q2_BASE + 0x400000;
*
* The code above is for loading the `zImage' file from Nokia
* images. */
- printf("%i bytes of image loaded\n", load_image(option_rom[0],
- phys_ram_base + 0x400000));
+ rom_size = load_image_targphys(option_rom[0],
+ OMAP2_Q2_BASE + 0x400000,
+ sdram_size - 0x400000);
+ printf("%i bytes of image loaded\n", rom_size);
- n800_setup_nolo_tags(phys_ram_base + sdram_size);
+ n800_setup_nolo_tags(nolo_tags);
+ cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000);
}
/* FIXME: We shouldn't really be doing this here. The LCD controller
will set the size once configured, so this just sets an initial
size until the guest activates the display. */
- dpy_resize(ds, 800, 480);
+ ds = get_displaystate();
+ ds->surface = qemu_resize_displaysurface(ds, 800, 480);
+ dpy_resize(ds);
}
static struct arm_boot_info n800_binfo = {
.atag_board = n810_atag_setup,
};
-static void n800_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void n800_init(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- return n8x0_init(ram_size, boot_device, ds,
+ return n8x0_init(ram_size, boot_device,
kernel_filename, kernel_cmdline, initrd_filename,
cpu_model, &n800_binfo, 800);
}
-static void n810_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void n810_init(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- return n8x0_init(ram_size, boot_device, ds,
+ return n8x0_init(ram_size, boot_device,
kernel_filename, kernel_cmdline, initrd_filename,
cpu_model, &n810_binfo, 810);
}
-QEMUMachine n800_machine = {
- "n800",
- "Nokia N800 tablet aka. RX-34 (OMAP2420)",
- n800_init,
- (0x08000000 + 0x00010000 + OMAP242X_SRAM_SIZE) | RAMSIZE_FIXED,
+static QEMUMachine n800_machine = {
+ .name = "n800",
+ .desc = "Nokia N800 tablet aka. RX-34 (OMAP2420)",
+ .init = n800_init,
};
-QEMUMachine n810_machine = {
- "n810",
- "Nokia N810 tablet aka. RX-44 (OMAP2420)",
- n810_init,
- (0x08000000 + 0x00010000 + OMAP242X_SRAM_SIZE) | RAMSIZE_FIXED,
+static QEMUMachine n810_machine = {
+ .name = "n810",
+ .desc = "Nokia N810 tablet aka. RX-44 (OMAP2420)",
+ .init = n810_init,
};
+
+static void nseries_machine_init(void)
+{
+ qemu_register_machine(&n800_machine);
+ qemu_register_machine(&n810_machine);
+}
+
+machine_init(nseries_machine_init);
projects / mirror_qemu.git / blobdiff