#include "hpet_emul.h"
#include "watchdog.h"
#include "smbios.h"
+#include "ide.h"
/* output Bochs bios info messages */
//#define DEBUG_BIOS
+/* Show multiboot debug output */
+//#define DEBUG_MULTIBOOT
+
#define BIOS_FILENAME "bios.bin"
#define VGABIOS_FILENAME "vgabios.bin"
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
#define BIOS_CFG_IOPORT 0x510
#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
+#define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
#define MAX_IDE_BUS 2
static fdctrl_t *floppy_controller;
static RTCState *rtc_state;
static PITState *pit;
-static IOAPICState *ioapic;
-static PCIDevice *i440fx_state;
+static PCII440FXState *i440fx_state;
typedef struct rom_reset_data {
uint8_t *data;
cpu_physical_memory_read(addr, rrd->data, size);
rrd->addr = addr;
rrd->size = size;
- qemu_register_reset(option_rom_reset, 0, rrd);
+ qemu_register_reset(option_rom_reset, rrd);
}
+typedef struct isa_irq_state {
+ qemu_irq *i8259;
+ qemu_irq *ioapic;
+} IsaIrqState;
+
+static void isa_irq_handler(void *opaque, int n, int level)
+{
+ IsaIrqState *isa = (IsaIrqState *)opaque;
+
+ if (n < 16) {
+ qemu_set_irq(isa->i8259[n], level);
+ }
+ qemu_set_irq(isa->ioapic[n], level);
+};
+
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
{
}
/* TSC handling */
uint64_t cpu_get_tsc(CPUX86State *env)
{
- /* Note: when using kqemu, it is more logical to return the host TSC
- because kqemu does not trap the RDTSC instruction for
- performance reasons */
-#ifdef CONFIG_KQEMU
- if (env->kqemu_enabled) {
- return cpu_get_real_ticks();
- } else
-#endif
- {
- return cpu_get_ticks();
- }
+ return cpu_get_ticks();
}
/* SMM support */
/* hd_table must contain 4 block drivers */
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
- const char *boot_device, BlockDriverState **hd_table)
+ const char *boot_device, DriveInfo **hd_table)
{
RTCState *s = rtc_state;
int nbds, bds[3] = { 0, };
rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
if (hd_table[0])
- cmos_init_hd(0x19, 0x1b, hd_table[0]);
+ cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
if (hd_table[1])
- cmos_init_hd(0x1a, 0x24, hd_table[1]);
+ cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
val = 0;
for (i = 0; i < 4; i++) {
geometry. It is always such that: 1 <= sects <= 63, 1
<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
geometry can be different if a translation is done. */
- translation = bdrv_get_translation_hint(hd_table[i]);
+ translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
if (translation == BIOS_ATA_TRANSLATION_AUTO) {
- bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors);
+ bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, §ors);
if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
/* No translation. */
translation = 0;
extern uint64_t node_cpumask[MAX_NODES];
-static void bochs_bios_init(void)
+static void *bochs_bios_init(void)
{
void *fw_cfg;
uint8_t *smbios_table;
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
+
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
acpi_tables_len);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
smbios_table = smbios_get_table(&smbios_len);
if (smbios_table)
}
fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
(1 + smp_cpus + nb_numa_nodes) * 8);
+
+ return fw_cfg;
}
/* Generate an initial boot sector which sets state and jump to
return size;
}
-static void load_linux(target_phys_addr_t option_rom,
+#define MULTIBOOT_STRUCT_ADDR 0x9000
+
+#if MULTIBOOT_STRUCT_ADDR > 0xf0000
+#error multiboot struct needs to fit in 16 bit real mode
+#endif
+
+static int load_multiboot(void *fw_cfg,
+ FILE *f,
+ const char *kernel_filename,
+ const char *initrd_filename,
+ const char *kernel_cmdline,
+ uint8_t *header)
+{
+ int i, t, is_multiboot = 0;
+ uint32_t flags = 0;
+ uint32_t mh_entry_addr;
+ uint32_t mh_load_addr;
+ uint32_t mb_kernel_size;
+ uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
+ uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
+ uint32_t mb_cmdline = mb_bootinfo + 0x200;
+ uint32_t mb_mod_end;
+
+ /* Ok, let's see if it is a multiboot image.
+ The header is 12x32bit long, so the latest entry may be 8192 - 48. */
+ for (i = 0; i < (8192 - 48); i += 4) {
+ if (ldl_p(header+i) == 0x1BADB002) {
+ uint32_t checksum = ldl_p(header+i+8);
+ flags = ldl_p(header+i+4);
+ checksum += flags;
+ checksum += (uint32_t)0x1BADB002;
+ if (!checksum) {
+ is_multiboot = 1;
+ break;
+ }
+ }
+ }
+
+ if (!is_multiboot)
+ return 0; /* no multiboot */
+
+#ifdef DEBUG_MULTIBOOT
+ fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
+#endif
+
+ if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
+ fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
+ }
+ if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
+ uint64_t elf_entry;
+ int kernel_size;
+ fclose(f);
+ kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL);
+ if (kernel_size < 0) {
+ fprintf(stderr, "Error while loading elf kernel\n");
+ exit(1);
+ }
+ mh_load_addr = mh_entry_addr = elf_entry;
+ mb_kernel_size = kernel_size;
+
+#ifdef DEBUG_MULTIBOOT
+ fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
+ mb_kernel_size, (size_t)mh_entry_addr);
+#endif
+ } else {
+ /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
+ uint32_t mh_header_addr = ldl_p(header+i+12);
+ mh_load_addr = ldl_p(header+i+16);
+#ifdef DEBUG_MULTIBOOT
+ uint32_t mh_load_end_addr = ldl_p(header+i+20);
+ uint32_t mh_bss_end_addr = ldl_p(header+i+24);
+#endif
+ uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
+
+ mh_entry_addr = ldl_p(header+i+28);
+ mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
+
+ /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
+ uint32_t mh_mode_type = ldl_p(header+i+32);
+ uint32_t mh_width = ldl_p(header+i+36);
+ uint32_t mh_height = ldl_p(header+i+40);
+ uint32_t mh_depth = ldl_p(header+i+44); */
+
+#ifdef DEBUG_MULTIBOOT
+ fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
+ fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
+ fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
+ fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
+#endif
+
+ fseek(f, mb_kernel_text_offset, SEEK_SET);
+
+#ifdef DEBUG_MULTIBOOT
+ fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
+ mb_kernel_size, mh_load_addr);
+#endif
+
+ if (!fread_targphys_ok(mh_load_addr, mb_kernel_size, f)) {
+ fprintf(stderr, "qemu: read error on multiboot kernel '%s' (%#x)\n",
+ kernel_filename, mb_kernel_size);
+ exit(1);
+ }
+ fclose(f);
+ }
+
+ /* blob size is only the kernel for now */
+ mb_mod_end = mh_load_addr + mb_kernel_size;
+
+ /* load modules */
+ stl_phys(mb_bootinfo + 20, 0x0); /* mods_count */
+ if (initrd_filename) {
+ uint32_t mb_mod_info = mb_bootinfo + 0x100;
+ uint32_t mb_mod_cmdline = mb_bootinfo + 0x300;
+ uint32_t mb_mod_start = mh_load_addr;
+ uint32_t mb_mod_length = mb_kernel_size;
+ char *next_initrd;
+ char *next_space;
+ int mb_mod_count = 0;
+
+ do {
+ next_initrd = strchr(initrd_filename, ',');
+ if (next_initrd)
+ *next_initrd = '\0';
+ /* if a space comes after the module filename, treat everything
+ after that as parameters */
+ cpu_physical_memory_write(mb_mod_cmdline, (uint8_t*)initrd_filename,
+ strlen(initrd_filename) + 1);
+ stl_phys(mb_mod_info + 8, mb_mod_cmdline); /* string */
+ mb_mod_cmdline += strlen(initrd_filename) + 1;
+ if ((next_space = strchr(initrd_filename, ' ')))
+ *next_space = '\0';
+#ifdef DEBUG_MULTIBOOT
+ printf("multiboot loading module: %s\n", initrd_filename);
+#endif
+ f = fopen(initrd_filename, "rb");
+ if (f) {
+ mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
+ & (TARGET_PAGE_MASK);
+ mb_mod_length = get_file_size(f);
+ mb_mod_end = mb_mod_start + mb_mod_length;
+
+ if (!fread_targphys_ok(mb_mod_start, mb_mod_length, f)) {
+ fprintf(stderr, "qemu: read error on multiboot module '%s' (%#x)\n",
+ initrd_filename, mb_mod_length);
+ exit(1);
+ }
+
+ mb_mod_count++;
+ stl_phys(mb_mod_info + 0, mb_mod_start);
+ stl_phys(mb_mod_info + 4, mb_mod_start + mb_mod_length);
+#ifdef DEBUG_MULTIBOOT
+ printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start,
+ mb_mod_start + mb_mod_length);
+#endif
+ stl_phys(mb_mod_info + 12, 0x0); /* reserved */
+ }
+ initrd_filename = next_initrd+1;
+ mb_mod_info += 16;
+ } while (next_initrd);
+ stl_phys(mb_bootinfo + 20, mb_mod_count); /* mods_count */
+ stl_phys(mb_bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
+ }
+
+ /* Make sure we're getting kernel + modules back after reset */
+ option_rom_setup_reset(mh_load_addr, mb_mod_end - mh_load_addr);
+
+ /* Commandline support */
+ stl_phys(mb_bootinfo + 16, mb_cmdline);
+ t = strlen(kernel_filename);
+ cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_filename, t);
+ mb_cmdline += t;
+ stb_phys(mb_cmdline++, ' ');
+ t = strlen(kernel_cmdline) + 1;
+ cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_cmdline, t);
+
+ /* the kernel is where we want it to be now */
+
+#define MULTIBOOT_FLAGS_MEMORY (1 << 0)
+#define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
+#define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
+#define MULTIBOOT_FLAGS_MODULES (1 << 3)
+#define MULTIBOOT_FLAGS_MMAP (1 << 6)
+ stl_phys(mb_bootinfo, MULTIBOOT_FLAGS_MEMORY
+ | MULTIBOOT_FLAGS_BOOT_DEVICE
+ | MULTIBOOT_FLAGS_CMDLINE
+ | MULTIBOOT_FLAGS_MODULES
+ | MULTIBOOT_FLAGS_MMAP);
+ stl_phys(mb_bootinfo + 4, 640); /* mem_lower */
+ stl_phys(mb_bootinfo + 8, ram_size / 1024); /* mem_upper */
+ stl_phys(mb_bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
+ stl_phys(mb_bootinfo + 48, mmap_addr); /* mmap_addr */
+
+#ifdef DEBUG_MULTIBOOT
+ fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
+#endif
+
+ /* Pass variables to option rom */
+ fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_entry_addr);
+ fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
+ fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, mmap_addr);
+
+ /* Make sure we're getting the config space back after reset */
+ option_rom_setup_reset(mb_bootinfo, 0x500);
+
+ option_rom[nb_option_roms] = "multiboot.bin";
+ nb_option_roms++;
+
+ return 1; /* yes, we are multiboot */
+}
+
+static void load_linux(void *fw_cfg,
+ target_phys_addr_t option_rom,
const char *kernel_filename,
const char *initrd_filename,
const char *kernel_cmdline,
uint16_t real_seg;
int setup_size, kernel_size, initrd_size = 0, cmdline_size;
uint32_t initrd_max;
- uint8_t header[1024];
+ uint8_t header[8192];
target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
FILE *f, *fi;
+ char *vmode;
/* Align to 16 bytes as a paranoia measure */
cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
/* load the kernel header */
f = fopen(kernel_filename, "rb");
if (!f || !(kernel_size = get_file_size(f)) ||
- fread(header, 1, 1024, f) != 1024) {
+ fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
+ MIN(ARRAY_SIZE(header), kernel_size)) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
kernel_filename);
exit(1);
#endif
if (ldl_p(header+0x202) == 0x53726448)
protocol = lduw_p(header+0x206);
- else
+ else {
+ /* This looks like a multiboot kernel. If it is, let's stop
+ treating it like a Linux kernel. */
+ if (load_multiboot(fw_cfg, f, kernel_filename,
+ initrd_filename, kernel_cmdline, header))
+ return;
protocol = 0;
+ }
if (protocol < 0x200 || !(header[0x211] & 0x01)) {
/* Low kernel */
stw_p(header+0x22, cmdline_addr-real_addr);
}
+ /* handle vga= parameter */
+ vmode = strstr(kernel_cmdline, "vga=");
+ if (vmode) {
+ unsigned int video_mode;
+ /* skip "vga=" */
+ vmode += 4;
+ if (!strncmp(vmode, "normal", 6)) {
+ video_mode = 0xffff;
+ } else if (!strncmp(vmode, "ext", 3)) {
+ video_mode = 0xfffe;
+ } else if (!strncmp(vmode, "ask", 3)) {
+ video_mode = 0xfffd;
+ } else {
+ video_mode = strtol(vmode, NULL, 0);
+ }
+ stw_p(header+0x1fa, video_mode);
+ }
+
/* loader type */
/* High nybble = B reserved for Qemu; low nybble is revision number.
If this code is substantially changed, you may want to consider
}
/* store the finalized header and load the rest of the kernel */
- cpu_physical_memory_write(real_addr, header, 1024);
+ cpu_physical_memory_write(real_addr, header, ARRAY_SIZE(header));
setup_size = header[0x1f1];
if (setup_size == 0)
setup_size = 4;
setup_size = (setup_size+1)*512;
- kernel_size -= setup_size; /* Size of protected-mode code */
+ /* Size of protected-mode code */
+ kernel_size -= (setup_size > ARRAY_SIZE(header)) ? setup_size : ARRAY_SIZE(header);
+
+ /* In case we have read too much already, copy that over */
+ if (setup_size < ARRAY_SIZE(header)) {
+ cpu_physical_memory_write(prot_addr, header + setup_size, ARRAY_SIZE(header) - setup_size);
+ prot_addr += (ARRAY_SIZE(header) - setup_size);
+ setup_size = ARRAY_SIZE(header);
+ }
- if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
+ if (!fread_targphys_ok(real_addr + ARRAY_SIZE(header),
+ setup_size - ARRAY_SIZE(header), f) ||
!fread_targphys_ok(prot_addr, kernel_size, f)) {
fprintf(stderr, "qemu: read error on kernel '%s'\n",
kernel_filename);
generate_bootsect(option_rom, gpr, seg, 0);
}
-static void main_cpu_reset(void *opaque)
-{
- CPUState *env = opaque;
- cpu_reset(env);
-}
-
static const int ide_iobase[2] = { 0x1f0, 0x170 };
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
static const int ide_irq[2] = { 14, 15 };
}
#endif
-static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
+static void pc_init_ne2k_isa(NICInfo *nd)
{
static int nb_ne2k = 0;
if (nb_ne2k == NE2000_NB_MAX)
return;
- isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
+ isa_ne2000_init(ne2000_io[nb_ne2k],
+ isa_reserve_irq(ne2000_irq[nb_ne2k]), nd);
nb_ne2k++;
}
return size;
}
+int cpu_is_bsp(CPUState *env)
+{
+ return env->cpuid_apic_id == 0;
+}
+
+static CPUState *pc_new_cpu(const char *cpu_model)
+{
+ CPUState *env;
+
+ env = cpu_init(cpu_model);
+ if (!env) {
+ fprintf(stderr, "Unable to find x86 CPU definition\n");
+ exit(1);
+ }
+ if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
+ env->cpuid_apic_id = env->cpu_index;
+ /* APIC reset callback resets cpu */
+ apic_init(env);
+ } else {
+ qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
+ }
+ return env;
+}
+
/* PC hardware initialisation */
static void pc_init1(ram_addr_t ram_size,
const char *boot_device,
- const char *kernel_filename, const char *kernel_cmdline,
+ const char *kernel_filename,
+ const char *kernel_cmdline,
const char *initrd_filename,
- int pci_enabled, const char *cpu_model)
+ const char *cpu_model,
+ int pci_enabled)
{
char *filename;
int ret, linux_boot, i;
ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
int bios_size, isa_bios_size, oprom_area_size;
PCIBus *pci_bus;
+ ISADevice *isa_dev;
int piix3_devfn = -1;
CPUState *env;
qemu_irq *cpu_irq;
+ qemu_irq *isa_irq;
qemu_irq *i8259;
- int index;
- BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+ IsaIrqState *isa_irq_state;
+ DriveInfo *dinfo;
+ DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
+ void *fw_cfg;
if (ram_size >= 0xe0000000 ) {
above_4g_mem_size = ram_size - 0xe0000000;
cpu_model = "qemu32";
#endif
}
-
- for(i = 0; i < smp_cpus; i++) {
- env = cpu_init(cpu_model);
- if (!env) {
- fprintf(stderr, "Unable to find x86 CPU definition\n");
- exit(1);
- }
- if (i != 0)
- env->halted = 1;
- if (smp_cpus > 1) {
- /* XXX: enable it in all cases */
- env->cpuid_features |= CPUID_APIC;
- }
- qemu_register_reset(main_cpu_reset, 0, env);
- if (pci_enabled) {
- apic_init(env);
- }
+
+ for (i = 0; i < smp_cpus; i++) {
+ env = pc_new_cpu(cpu_model);
}
vmport_init();
if (oprom_area_size < 0x8000)
oprom_area_size = 0x8000;
+ /* map all the bios at the top of memory */
+ cpu_register_physical_memory((uint32_t)(-bios_size),
+ bios_size, bios_offset | IO_MEM_ROM);
+
+ fw_cfg = bochs_bios_init();
+
if (linux_boot) {
- load_linux(0xc0000 + oprom_area_size,
+ load_linux(fw_cfg, 0xc0000 + oprom_area_size,
kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
oprom_area_size += 2048;
}
for (i = 0; i < nb_option_roms; i++) {
- oprom_area_size += load_option_rom(option_rom[i],
- 0xc0000 + oprom_area_size, 0xe0000);
+ oprom_area_size += load_option_rom(option_rom[i], 0xc0000 + oprom_area_size,
+ 0xe0000);
}
- /* map all the bios at the top of memory */
- cpu_register_physical_memory((uint32_t)(-bios_size),
- bios_size, bios_offset | IO_MEM_ROM);
+ for (i = 0; i < nb_nics; i++) {
+ char nic_oprom[1024];
+ const char *model = nd_table[i].model;
- bochs_bios_init();
+ if (!nd_table[i].bootable)
+ continue;
+
+ if (model == NULL)
+ model = "e1000";
+ snprintf(nic_oprom, sizeof(nic_oprom), "pxe-%s.bin", model);
+
+ oprom_area_size += load_option_rom(nic_oprom, 0xc0000 + oprom_area_size,
+ 0xe0000);
+ }
cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
i8259 = i8259_init(cpu_irq[0]);
- ferr_irq = i8259[13];
+ isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
+ isa_irq_state->i8259 = i8259;
+ isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
if (pci_enabled) {
- pci_bus = i440fx_init(&i440fx_state, i8259);
- piix3_devfn = piix3_init(pci_bus, -1);
+ pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
} else {
pci_bus = NULL;
+ isa_bus_new(NULL);
}
+ isa_bus_irqs(isa_irq);
+
+ ferr_irq = isa_reserve_irq(13);
/* init basic PC hardware */
register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
}
}
- rtc_state = rtc_init(0x70, i8259[8], 2000);
+ rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000);
qemu_register_boot_set(pc_boot_set, rtc_state);
register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
if (pci_enabled) {
- ioapic = ioapic_init();
+ isa_irq_state->ioapic = ioapic_init();
}
- pit = pit_init(0x40, i8259[0]);
+ pit = pit_init(0x40, isa_reserve_irq(0));
pcspk_init(pit);
if (!no_hpet) {
- hpet_init(i8259);
- }
- if (pci_enabled) {
- pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
+ hpet_init(isa_irq);
}
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
if (serial_hds[i]) {
- serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
+ serial_init(serial_io[i], isa_reserve_irq(serial_irq[i]), 115200,
serial_hds[i]);
}
}
for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
if (parallel_hds[i]) {
- parallel_init(parallel_io[i], i8259[parallel_irq[i]],
+ parallel_init(parallel_io[i], isa_reserve_irq(parallel_irq[i]),
parallel_hds[i]);
}
}
- watchdog_pc_init(pci_bus);
-
for(i = 0; i < nb_nics; i++) {
NICInfo *nd = &nd_table[i];
if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
- pc_init_ne2k_isa(nd, i8259);
+ pc_init_ne2k_isa(nd);
else
- pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
+ pci_nic_init(nd, "e1000", NULL);
}
- qemu_system_hot_add_init();
+ piix4_acpi_system_hot_add_init();
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
- index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
- if (index != -1)
- hd[i] = drives_table[index].bdrv;
- else
- hd[i] = NULL;
+ hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
}
if (pci_enabled) {
- pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
+ pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, isa_irq);
} else {
for(i = 0; i < MAX_IDE_BUS; i++) {
- isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
+ isa_ide_init(ide_iobase[i], ide_iobase2[i],
+ isa_reserve_irq(ide_irq[i]),
hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
}
}
- i8042_init(i8259[1], i8259[12], 0x60);
+ isa_dev = isa_create_simple("i8042", 0x60, 0x64, 1, 12);
DMA_init(0);
#ifdef HAS_AUDIO
- audio_init(pci_enabled ? pci_bus : NULL, i8259);
+ audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
#endif
for(i = 0; i < MAX_FD; i++) {
- index = drive_get_index(IF_FLOPPY, 0, i);
- if (index != -1)
- fd[i] = drives_table[index].bdrv;
- else
- fd[i] = NULL;
+ dinfo = drive_get(IF_FLOPPY, 0, i);
+ fd[i] = dinfo ? dinfo->bdrv : NULL;
}
- floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
+ floppy_controller = fdctrl_init_isa(6, 2, 0x3f0, fd);
cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
i2c_bus *smbus;
/* TODO: Populate SPD eeprom data. */
- smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
+ smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
+ isa_reserve_irq(9));
for (i = 0; i < 8; i++) {
DeviceState *eeprom;
eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
- qdev_set_prop_int(eeprom, "address", 0x50 + i);
- qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256));
+ qdev_prop_set_uint32(eeprom, "address", 0x50 + i);
+ qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
qdev_init(eeprom);
}
}
}
}
- /* Add virtio block devices */
- if (pci_enabled) {
- int index;
- int unit_id = 0;
-
- while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
- pci_create_simple(pci_bus, -1, "virtio-blk-pci");
- unit_id++;
- }
- }
-
- /* Add virtio balloon device */
- if (pci_enabled) {
- pci_create_simple(pci_bus, -1, "virtio-balloon-pci");
- }
-
/* Add virtio console devices */
if (pci_enabled) {
for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
{
pc_init1(ram_size, boot_device,
kernel_filename, kernel_cmdline,
- initrd_filename, 1, cpu_model);
+ initrd_filename, cpu_model, 1);
}
static void pc_init_isa(ram_addr_t ram_size,
{
pc_init1(ram_size, boot_device,
kernel_filename, kernel_cmdline,
- initrd_filename, 0, cpu_model);
+ initrd_filename, cpu_model, 0);
}
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
}
static QEMUMachine pc_machine = {
- .name = "pc",
+ .name = "pc-0.11",
+ .alias = "pc",
.desc = "Standard PC",
.init = pc_init_pci,
.max_cpus = 255,
.is_default = 1,
};
+static QEMUMachine pc_machine_v0_10 = {
+ .name = "pc-0.10",
+ .desc = "Standard PC, qemu 0.10",
+ .init = pc_init_pci,
+ .max_cpus = 255,
+ .compat_props = (CompatProperty[]) {
+ {
+ .driver = "virtio-blk-pci",
+ .property = "class",
+ .value = stringify(PCI_CLASS_STORAGE_OTHER),
+ },{
+ .driver = "virtio-console-pci",
+ .property = "class",
+ .value = stringify(PCI_CLASS_DISPLAY_OTHER),
+ },{
+ .driver = "virtio-net-pci",
+ .property = "vectors",
+ .value = stringify(0),
+ },{
+ .driver = "virtio-blk-pci",
+ .property = "vectors",
+ .value = stringify(0),
+ },
+ { /* end of list */ }
+ },
+};
+
static QEMUMachine isapc_machine = {
.name = "isapc",
.desc = "ISA-only PC",
static void pc_machine_init(void)
{
qemu_register_machine(&pc_machine);
+ qemu_register_machine(&pc_machine_v0_10);
qemu_register_machine(&isapc_machine);
}
projects / mirror_qemu.git / blobdiff