*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/sysbus.h"
-#include "hw/pci/pci.h"
+#include "migration/vmstate.h"
+#include "hw/irq.h"
+#include "hw/pci/pci_device.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
-#include "exec/address-spaces.h"
+#include "hw/qdev-properties.h"
#include "qemu/log.h"
+#include "qemu/module.h"
+#include "qom/object.h"
/* Old and buggy versions of QEMU used the wrong mapping from
* PCI IRQs to system interrupt lines. Unfortunately the Linux
PCI_VPB_IRQMAP_FORCE_OK,
};
-typedef struct {
+struct PCIVPBState {
PCIHostState parent_obj;
qemu_irq irq[4];
uint32_t selfid;
uint32_t flags;
uint8_t irq_mapping;
-} PCIVPBState;
+};
+typedef struct PCIVPBState PCIVPBState;
static void pci_vpb_update_window(PCIVPBState *s, int i)
{
};
#define TYPE_VERSATILE_PCI "versatile_pci"
-#define PCI_VPB(obj) \
- OBJECT_CHECK(PCIVPBState, (obj), TYPE_VERSATILE_PCI)
+DECLARE_INSTANCE_CHECKER(PCIVPBState, PCI_VPB,
+ TYPE_VERSATILE_PCI)
#define TYPE_VERSATILE_PCI_HOST "versatile_pci_host"
-#define PCI_VPB_HOST(obj) \
- OBJECT_CHECK(PCIDevice, (obj), TYPE_VERSATILE_PCIHOST)
+DECLARE_INSTANCE_CHECKER(PCIDevice, PCI_VPB_HOST,
+ TYPE_VERSATILE_PCI_HOST)
typedef enum {
PCI_IMAP0 = 0x0,
static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
{
- PCIVPBState *s = container_of(d->bus, PCIVPBState, pci_bus);
+ PCIVPBState *s = container_of(pci_get_bus(d), PCIVPBState, pci_bus);
if (s->irq_mapping == PCI_VPB_IRQMAP_BROKEN) {
/* Legacy broken IRQ mapping for compatibility with old and
pci_map_irq_fn mapfn;
int i;
- memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32);
- memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32);
+ memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 4 * GiB);
+ memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 4 * GiB);
- pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
- &s->pci_mem_space, &s->pci_io_space,
- PCI_DEVFN(11, 0), TYPE_PCI_BUS);
+ pci_root_bus_init(&s->pci_bus, sizeof(s->pci_bus), dev, "pci",
+ &s->pci_mem_space, &s->pci_io_space,
+ PCI_DEVFN(11, 0), TYPE_PCI_BUS);
h->bus = &s->pci_bus;
object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST);
- qdev_set_parent_bus(DEVICE(&s->pci_dev), BUS(&s->pci_bus));
for (i = 0; i < 4; i++) {
sysbus_init_irq(sbd, &s->irq[i]);
mapfn = pci_vpb_map_irq;
}
- pci_bus_irqs(&s->pci_bus, pci_vpb_set_irq, mapfn, s->irq, 4);
+ pci_bus_irqs(&s->pci_bus, pci_vpb_set_irq, s->irq, 4);
+ pci_bus_map_irqs(&s->pci_bus, mapfn);
/* Our memory regions are:
* 0 : our control registers
}
/* TODO Remove once realize propagates to child devices. */
- object_property_set_bool(OBJECT(&s->pci_bus), true, "realized", errp);
- object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp);
+ qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp);
}
static void versatile_pci_host_realize(PCIDevice *d, Error **errp)
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = versatile_pci_host_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static Property pci_vpb_properties[] = {
dc->realize = pci_vpb_realize;
dc->reset = pci_vpb_reset;
dc->vmsd = &pci_vpb_vmstate;
- dc->props = pci_vpb_properties;
+ device_class_set_props(dc, pci_vpb_properties);
}
static const TypeInfo pci_vpb_info = {