Clean up MMIO TLB handling.

[mirror_qemu.git] / hw / pflash_cfi01.c

diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index c360179c3cfa465dfc833909c928e7d47e06d44f..771ea854d0cc9a582402772b2d8546cc8c15df24 100644 (file)
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -202,14 +202,8 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
     uint8_t *p;
     uint8_t cmd;
 
-    /* WARNING: when the memory area is in ROMD mode, the offset is a
-       ram offset, not a physical address */
     cmd = value;
-
-    if (pfl->wcycle == 0)
-        offset -= (target_ulong)(long)pfl->storage;
-    else
-        offset -= pfl->base;
+    offset -= pfl->base;
 
     DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d wcycle 0x%x\n",
             __func__, offset, value, width, pfl->wcycle);