* (at your option) any later version.
*/
-#include "config.h"
+#include "qemu/osdep.h"
+#include "qapi/error.h"
#include "qemu-common.h"
#include "e500.h"
#include "e500-ccsr.h"
#define MPC8544_PCI_REGS_SIZE 0x1000ULL
#define MPC8544_UTIL_OFFSET 0xe0000ULL
#define MPC8XXX_GPIO_OFFSET 0x000FF000ULL
-#define MPC8XXX_GPIO_IRQ 43
+#define MPC8XXX_GPIO_IRQ 47
struct boot_info
{
int len;
uint32_t pci_ranges[14] =
{
- 0x2000000, 0x0, 0xc0000000,
- 0x0, 0xc0000000,
+ 0x2000000, 0x0, params->pci_mmio_bus_base,
+ params->pci_mmio_base >> 32, params->pci_mmio_base,
0x0, 0x20000000,
0x1000000, 0x0, 0x0,
}
fdt = load_device_tree(filename, &fdt_size);
+ g_free(filename);
if (!fdt) {
goto out;
}
}
/* Create -kernel TLB entries for BookE. */
-static inline hwaddr booke206_page_size_to_tlb(uint64_t size)
+hwaddr booke206_page_size_to_tlb(uint64_t size)
{
return 63 - clz64(size >> 10);
}
}
static DeviceState *ppce500_init_mpic_kvm(PPCE500Params *params,
- qemu_irq **irqs)
+ qemu_irq **irqs, Error **errp)
{
+ Error *err = NULL;
DeviceState *dev;
CPUState *cs;
- int r;
dev = qdev_create(NULL, TYPE_KVM_OPENPIC);
qdev_prop_set_uint32(dev, "model", params->mpic_version);
- r = qdev_init(dev);
- if (r) {
+ object_property_set_bool(OBJECT(dev), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ object_unparent(OBJECT(dev));
return NULL;
}
return dev;
}
-static qemu_irq *ppce500_init_mpic(PPCE500Params *params, MemoryRegion *ccsr,
- qemu_irq **irqs)
+static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params,
+ MemoryRegion *ccsr, qemu_irq **irqs)
{
qemu_irq *mpic;
DeviceState *dev = NULL;
mpic = g_new0(qemu_irq, 256);
if (kvm_enabled()) {
- QemuOpts *machine_opts = qemu_get_machine_opts();
- bool irqchip_allowed = qemu_opt_get_bool(machine_opts,
- "kernel_irqchip", true);
- bool irqchip_required = qemu_opt_get_bool(machine_opts,
- "kernel_irqchip", false);
-
- if (irqchip_allowed) {
- dev = ppce500_init_mpic_kvm(params, irqs);
- }
+ Error *err = NULL;
- if (irqchip_required && !dev) {
- fprintf(stderr, "%s: irqchip requested but unavailable\n",
- __func__);
- abort();
+ if (machine_kernel_irqchip_allowed(machine)) {
+ dev = ppce500_init_mpic_kvm(params, irqs, &err);
+ }
+ if (machine_kernel_irqchip_required(machine) && !dev) {
+ error_reportf_err(err,
+ "kernel_irqchip requested but unavailable: ");
+ exit(1);
}
}
memory_region_add_subregion(address_space_mem, params->ccsrbar_base,
ccsr_addr_space);
- mpic = ppce500_init_mpic(params, ccsr_addr_space, irqs);
+ mpic = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs);
/* Serial */
if (serial_hds[0]) {
if (!pci_bus)
printf("couldn't create PCI controller!\n");
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, params->pci_pio_base);
-
if (pci_bus) {
/* Register network interfaces. */
for (i = 0; i < nb_nics; i++) {
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
bios_size = load_elf(filename, NULL, NULL, &bios_entry, &loadaddr, NULL,
- 1, ELF_MACHINE, 0);
+ 1, PPC_ELF_MACHINE, 0, 0);
if (bios_size < 0) {
/*
* Hrm. No ELF image? Try a uImage, maybe someone is giving us an
exit(1);
}
}
+ g_free(filename);
/* Reserve space for dtb */
dt_base = (loadaddr + bios_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
boot_info->entry = bios_entry;
boot_info->dt_base = dt_base;
boot_info->dt_size = dt_size;
-
- if (kvm_enabled()) {
- kvmppc_init();
- }
}
static int e500_ccsr_initfn(SysBusDevice *dev)