/* PCI intack register */
/* Read-only register (?) */
static void _PPC_intack_write (void *opaque,
- a_target_phys_addr addr, uint32_t value)
+ target_phys_addr_t addr, uint32_t value)
{
#if 0
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
#endif
}
-static inline uint32_t _PPC_intack_read(a_target_phys_addr addr)
+static inline uint32_t _PPC_intack_read(target_phys_addr_t addr)
{
uint32_t retval = 0;
return retval;
}
-static uint32_t PPC_intack_readb (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_intack_readb (void *opaque, target_phys_addr_t addr)
{
return _PPC_intack_read(addr);
}
-static uint32_t PPC_intack_readw (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_intack_readw (void *opaque, target_phys_addr_t addr)
{
#ifdef TARGET_WORDS_BIGENDIAN
return bswap16(_PPC_intack_read(addr));
#endif
}
-static uint32_t PPC_intack_readl (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_intack_readl (void *opaque, target_phys_addr_t addr)
{
#ifdef TARGET_WORDS_BIGENDIAN
return bswap32(_PPC_intack_read(addr));
} XCSR;
static void PPC_XCSR_writeb (void *opaque,
- a_target_phys_addr addr, uint32_t value)
+ target_phys_addr_t addr, uint32_t value)
{
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
static void PPC_XCSR_writew (void *opaque,
- a_target_phys_addr addr, uint32_t value)
+ target_phys_addr_t addr, uint32_t value)
{
#ifdef TARGET_WORDS_BIGENDIAN
value = bswap16(value);
}
static void PPC_XCSR_writel (void *opaque,
- a_target_phys_addr addr, uint32_t value)
+ target_phys_addr_t addr, uint32_t value)
{
#ifdef TARGET_WORDS_BIGENDIAN
value = bswap32(value);
value);
}
-static uint32_t PPC_XCSR_readb (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_XCSR_readb (void *opaque, target_phys_addr_t addr)
{
uint32_t retval = 0;
return retval;
}
-static uint32_t PPC_XCSR_readw (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_XCSR_readw (void *opaque, target_phys_addr_t addr)
{
uint32_t retval = 0;
return retval;
}
-static uint32_t PPC_XCSR_readl (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_XCSR_readl (void *opaque, target_phys_addr_t addr)
{
uint32_t retval = 0;
#endif
/* Fake super-io ports for PREP platform (Intel 82378ZB) */
-typedef struct sysctrl {
+typedef struct sysctrl_t {
qemu_irq reset_irq;
- a_m48t59 *nvram;
+ m48t59_t *nvram;
uint8_t state;
uint8_t syscontrol;
uint8_t fake_io[2];
int contiguous_map;
int endian;
-} a_sysctrl;
+} sysctrl_t;
enum {
STATE_HARDFILE = 0x01,
};
-static a_sysctrl *sysctrl;
+static sysctrl_t *sysctrl;
static void PREP_io_write (void *opaque, uint32_t addr, uint32_t val)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
PPC_IO_DPRINTF("0x%08" PRIx32 " => 0x%02" PRIx32 "\n", addr - PPC_IO_BASE,
val);
static uint32_t PREP_io_read (void *opaque, uint32_t addr)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
PPC_IO_DPRINTF("0x%08" PRIx32 " <= 0x%02" PRIx32 "\n", addr - PPC_IO_BASE,
sysctrl->fake_io[addr - 0x0398]);
static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
PPC_IO_DPRINTF("0x%08" PRIx32 " => 0x%02" PRIx32 "\n",
addr - PPC_IO_BASE, val);
static uint32_t PREP_io_800_readb (void *opaque, uint32_t addr)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
uint32_t retval = 0xFF;
switch (addr) {
return retval;
}
-static inline a_target_phys_addr prep_IO_address(a_sysctrl *sysctrl,
- a_target_phys_addr addr)
+static inline target_phys_addr_t prep_IO_address(sysctrl_t *sysctrl,
+ target_phys_addr_t addr)
{
if (sysctrl->contiguous_map == 0) {
/* 64 KB contiguous space for IOs */
return addr;
}
-static void PPC_prep_io_writeb (void *opaque, a_target_phys_addr addr,
+static void PPC_prep_io_writeb (void *opaque, target_phys_addr_t addr,
uint32_t value)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
cpu_outb(addr, value);
}
-static uint32_t PPC_prep_io_readb (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_prep_io_readb (void *opaque, target_phys_addr_t addr)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
return ret;
}
-static void PPC_prep_io_writew (void *opaque, a_target_phys_addr addr,
+static void PPC_prep_io_writew (void *opaque, target_phys_addr_t addr,
uint32_t value)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
#ifdef TARGET_WORDS_BIGENDIAN
cpu_outw(addr, value);
}
-static uint32_t PPC_prep_io_readw (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_prep_io_readw (void *opaque, target_phys_addr_t addr)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
return ret;
}
-static void PPC_prep_io_writel (void *opaque, a_target_phys_addr addr,
+static void PPC_prep_io_writel (void *opaque, target_phys_addr_t addr,
uint32_t value)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
#ifdef TARGET_WORDS_BIGENDIAN
cpu_outl(addr, value);
}
-static uint32_t PPC_prep_io_readl (void *opaque, a_target_phys_addr addr)
+static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
{
- a_sysctrl *sysctrl = opaque;
+ sysctrl_t *sysctrl = opaque;
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
#define NVRAM_SIZE 0x2000
/* PowerPC PREP hardware initialisation */
-static void ppc_prep_init (a_ram_addr ram_size,
+static void ppc_prep_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
{
CPUState *env = NULL, *envs[MAX_CPUS];
char *filename;
- a_nvram nvram;
- a_m48t59 *m48t59;
+ nvram_t nvram;
+ m48t59_t *m48t59;
int PPC_io_memory;
int linux_boot, i, nb_nics1, bios_size;
- a_ram_addr ram_offset, bios_offset;
+ ram_addr_t ram_offset, bios_offset;
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
PCIBus *pci_bus;
qemu_irq *i8259;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
- sysctrl = qemu_mallocz(sizeof(a_sysctrl));
+ sysctrl = qemu_mallocz(sizeof(sysctrl_t));
linux_boot = (kernel_filename != NULL);
bios_size = -1;
}
if (bios_size > 0 && bios_size <= BIOS_SIZE) {
- a_target_phys_addr bios_addr;
+ target_phys_addr_t bios_addr;
bios_size = (bios_size + 0xfff) & ~0xfff;
bios_addr = (uint32_t)(-bios_size);
cpu_register_physical_memory(bios_addr, bios_size,