#include "hw/s390x/css.h"
#include "virtio-ccw.h"
#include "qemu/config-file.h"
+#include "qemu/ctype.h"
#include "qemu/error-report.h"
#include "qemu/option.h"
#include "s390-pci-bus.h"
+#include "sysemu/reset.h"
#include "hw/s390x/storage-keys.h"
#include "hw/s390x/storage-attributes.h"
#include "hw/s390x/event-facility.h"
#include "migration/register.h"
#include "cpu_models.h"
#include "hw/nmi.h"
+#include "hw/qdev-properties.h"
#include "hw/s390x/tod.h"
+#include "sysemu/sysemu.h"
S390CPU *s390_cpu_addr2state(uint16_t cpu_addr)
{
/* initialize possible_cpus */
mc->possible_cpu_arch_ids(machine);
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < machine->smp.cpus; i++) {
s390x_new_cpu(machine->cpu_type, i, &error_fatal);
}
}
* Configure the maximum page size. As no memory devices were created
* yet, this is the page size of initial memory only.
*/
- s390_set_max_pagesize(qemu_getrampagesize(), &local_err);
+ s390_set_max_pagesize(qemu_maxrampagesize(), &local_err);
if (local_err) {
error_report_err(local_err);
exit(EXIT_FAILURE);
s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu);
}
-static void s390_machine_reset(void)
+static void s390_machine_reset(MachineState *machine)
{
enum s390_reset reset_type;
CPUState *cs, *t;
static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms)
{
int i;
+ unsigned int max_cpus = ms->smp.max_cpus;
if (ms->possible_cpus) {
g_assert(ms->possible_cpus && ms->possible_cpus->len == max_cpus);
return NULL;
}
-static void s390_hot_add_cpu(const int64_t id, Error **errp)
+static void s390_hot_add_cpu(MachineState *machine,
+ const int64_t id, Error **errp)
{
- MachineState *machine = MACHINE(qdev_get_machine());
ObjectClass *oc;
g_assert(machine->possible_cpus->cpus[0].cpu);
} \
type_init(ccw_machine_register_##suffix)
+static void ccw_machine_4_2_instance_options(MachineState *machine)
+{
+}
+
+static void ccw_machine_4_2_class_options(MachineClass *mc)
+{
+}
+DEFINE_CCW_MACHINE(4_2, "4.2", true);
+
+static void ccw_machine_4_1_instance_options(MachineState *machine)
+{
+ ccw_machine_4_2_instance_options(machine);
+}
+
+static void ccw_machine_4_1_class_options(MachineClass *mc)
+{
+ ccw_machine_4_2_class_options(mc);
+ compat_props_add(mc->compat_props, hw_compat_4_1, hw_compat_4_1_len);
+}
+DEFINE_CCW_MACHINE(4_1, "4.1", false);
+
static void ccw_machine_4_0_instance_options(MachineState *machine)
{
+ static const S390FeatInit qemu_cpu_feat = { S390_FEAT_LIST_QEMU_V4_0 };
+ ccw_machine_4_1_instance_options(machine);
+ s390_set_qemu_cpu_model(0x2827, 12, 2, qemu_cpu_feat);
}
static void ccw_machine_4_0_class_options(MachineClass *mc)
{
+ ccw_machine_4_1_class_options(mc);
+ compat_props_add(mc->compat_props, hw_compat_4_0, hw_compat_4_0_len);
}
-DEFINE_CCW_MACHINE(4_0, "4.0", true);
+DEFINE_CCW_MACHINE(4_0, "4.0", false);
static void ccw_machine_3_1_instance_options(MachineState *machine)
{