}
for (index = 0; index < (s->blksize & BLOCK_SIZE_MASK); index++) {
- sdbus_write_data(&s->sdbus, s->fifo_buffer[index]);
+ sdbus_write_byte(&s->sdbus, s->fifo_buffer[index]);
}
/* Next data can be written through BUFFER DATORT register */
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
for (n = 0; n < block_size; n++) {
- sdbus_write_data(&s->sdbus, s->fifo_buffer[n]);
+ sdbus_write_byte(&s->sdbus, s->fifo_buffer[n]);
}
s->data_count = 0;
if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) {
} else {
dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
for (n = 0; n < datacnt; n++) {
- sdbus_write_data(&s->sdbus, s->fifo_buffer[n]);
+ sdbus_write_byte(&s->sdbus, s->fifo_buffer[n]);
}
}
s->blkcnt--;
dscr.addr += s->data_count - begin;
if (s->data_count == block_size) {
for (n = 0; n < block_size; n++) {
- sdbus_write_data(&s->sdbus, s->fifo_buffer[n]);
+ sdbus_write_byte(&s->sdbus, s->fifo_buffer[n]);
}
s->data_count = 0;
if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) {