graphical_console_init change (Stefano Stabellini)

[mirror_qemu.git] / hw / tcx.c

diff --git a/hw/tcx.c b/hw/tcx.c
index c72b99924b165c7e14fd29aecde7ebe4ada2296e..1005e63e2de17650fa0873b339deb672c19a3161 100644 (file)
--- a/hw/tcx.c
+++ b/hw/tcx.c
@@ -54,28 +54,19 @@ static void update_palette_entries(TCXState *s, int start, int end)
 {
     int i;
     for(i = start; i < end; i++) {
-        switch(s->ds->depth) {
+        switch(ds_get_bits_per_pixel(s->ds)) {
         default:
         case 8:
             s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]);
             break;
         case 15:
-            if (s->ds->bgr)
-                s->palette[i] = rgb_to_pixel15bgr(s->r[i], s->g[i], s->b[i]);
-            else
-                s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
+            s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
             break;
         case 16:
-            if (s->ds->bgr)
-                s->palette[i] = rgb_to_pixel16bgr(s->r[i], s->g[i], s->b[i]);
-            else
-                s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
+            s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
             break;
         case 32:
-            if (s->ds->bgr)
-                s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]);
-            else
-                s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
+            s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
             break;
         }
     }
@@ -123,19 +114,30 @@ static void tcx_draw_line8(TCXState *s1, uint8_t *d,
     }
 }
 
+/*
+  XXX Could be much more optimal:
+  * detect if line/page/whole screen is in 24 bit mode
+  * if destination is also BGR, use memcpy
+  */
 static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d,
                                      const uint8_t *s, int width,
                                      const uint32_t *cplane,
                                      const uint32_t *s24)
 {
-    int x;
-    uint8_t val;
+    int x, r, g, b;
+    uint8_t val, *p8;
     uint32_t *p = (uint32_t *)d;
     uint32_t dval;
 
     for(x = 0; x < width; x++, s++, s24++) {
-        if ((bswap32(*cplane++) & 0xff000000) == 0x03000000) { // 24-bit direct
-            dval = bswap32(*s24) & 0x00ffffff;
+        if ((be32_to_cpu(*cplane++) & 0xff000000) == 0x03000000) {
+            // 24-bit direct, BGR order
+            p8 = (uint8_t *)s24;
+            p8++;
+            b = *p8++;
+            g = *p8++;
+            r = *p8++;
+            dval = rgb_to_pixel32(r, g, b);
         } else {
             val = *s;
             dval = s1->palette[val];
@@ -184,18 +186,18 @@ static void tcx_update_display(void *opaque)
     uint8_t *d, *s;
     void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width);
 
-    if (ts->ds->depth == 0)
+    if (ds_get_bits_per_pixel(ts->ds) == 0)
         return;
     page = ts->vram_offset;
     y_start = -1;
     page_min = 0xffffffff;
     page_max = 0;
-    d = ts->ds->data;
+    d = ds_get_data(ts->ds);
     s = ts->vram;
-    dd = ts->ds->linesize;
+    dd = ds_get_linesize(ts->ds);
     ds = 1024;
 
-    switch (ts->ds->depth) {
+    switch (ds_get_bits_per_pixel(ts->ds)) {
     case 32:
         f = tcx_draw_line32;
         break;
@@ -262,7 +264,7 @@ static void tcx24_update_display(void *opaque)
     uint8_t *d, *s;
     uint32_t *cptr, *s24;
 
-    if (ts->ds->depth != 32)
+    if (ds_get_bits_per_pixel(ts->ds) != 32)
             return;
     page = ts->vram_offset;
     page24 = ts->vram24_offset;
@@ -270,11 +272,11 @@ static void tcx24_update_display(void *opaque)
     y_start = -1;
     page_min = 0xffffffff;
     page_max = 0;
-    d = ts->ds->data;
+    d = ds_get_data(ts->ds);
     s = ts->vram;
     s24 = ts->vram24;
     cptr = ts->cplane;
-    dd = ts->ds->linesize;
+    dd = ds_get_linesize(ts->ds);
     ds = 1024;
 
     for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE,
@@ -356,9 +358,9 @@ static void tcx_save(QEMUFile *f, void *opaque)
 {
     TCXState *s = opaque;
 
-    qemu_put_be16s(f, (uint16_t *)&s->height);
-    qemu_put_be16s(f, (uint16_t *)&s->width);
-    qemu_put_be16s(f, (uint16_t *)&s->depth);
+    qemu_put_be16s(f, &s->height);
+    qemu_put_be16s(f, &s->width);
+    qemu_put_be16s(f, &s->depth);
     qemu_put_buffer(f, s->r, 256);
     qemu_put_buffer(f, s->g, 256);
     qemu_put_buffer(f, s->b, 256);
@@ -375,13 +377,13 @@ static int tcx_load(QEMUFile *f, void *opaque, int version_id)
         return -EINVAL;
 
     if (version_id == 3) {
-        qemu_get_be32s(f, (uint32_t *)&dummy);
-        qemu_get_be32s(f, (uint32_t *)&dummy);
-        qemu_get_be32s(f, (uint32_t *)&dummy);
+        qemu_get_be32s(f, &dummy);
+        qemu_get_be32s(f, &dummy);
+        qemu_get_be32s(f, &dummy);
     }
-    qemu_get_be16s(f, (uint16_t *)&s->height);
-    qemu_get_be16s(f, (uint16_t *)&s->width);
-    qemu_get_be16s(f, (uint16_t *)&s->depth);
+    qemu_get_be16s(f, &s->height);
+    qemu_get_be16s(f, &s->width);
+    qemu_get_be16s(f, &s->depth);
     qemu_get_buffer(f, s->r, 256);
     qemu_get_buffer(f, s->g, 256);
     qemu_get_buffer(f, s->b, 256);
@@ -421,15 +423,13 @@ static uint32_t tcx_dac_readl(void *opaque, target_phys_addr_t addr)
 static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
 {
     TCXState *s = opaque;
-    uint32_t saddr;
 
-    saddr = (addr & (TCX_DAC_NREGS - 1)) >> 2;
-    switch (saddr) {
+    switch (addr) {
     case 0:
         s->dac_index = val >> 24;
         s->dac_state = 0;
         break;
-    case 1:
+    case 4:
         switch (s->dac_state) {
         case 0:
             s->r[s->dac_index] = val >> 24;
@@ -490,7 +490,7 @@ static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
     tcx_dummy_writel,
 };
 
-void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
+void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
               unsigned long vram_offset, int vram_size, int width, int height,
               int depth)
 {
@@ -501,7 +501,6 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
     s = qemu_mallocz(sizeof(TCXState));
     if (!s)
         return;
-    s->ds = ds;
     s->addr = addr;
     s->vram_offset = vram_offset;
     s->width = width;
@@ -537,14 +536,15 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
         s->cplane = (uint32_t *)vram_base;
         s->cplane_offset = vram_offset;
         cpu_register_physical_memory(addr + 0x0a000000ULL, size, vram_offset);
-        graphic_console_init(s->ds, tcx24_update_display,
-                             tcx24_invalidate_display,
-                             tcx24_screen_dump, NULL, s);
+        s->ds = graphic_console_init(tcx24_update_display,
+                                     tcx24_invalidate_display,
+                                     tcx24_screen_dump, NULL, s);
     } else {
         cpu_register_physical_memory(addr + 0x00300000ULL, TCX_THC_NREGS_8,
                                      dummy_memory);
-        graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,
-                             tcx_screen_dump, NULL, s);
+        s->ds = graphic_console_init(tcx_update_display,
+                                     tcx_invalidate_display,
+                                     tcx_screen_dump, NULL, s);
     }
     // NetBSD writes here even with 8-bit display
     cpu_register_physical_memory(addr + 0x00301000ULL, TCX_THC_NREGS_24,
@@ -553,7 +553,7 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
     register_savevm("tcx", addr, 4, tcx_save, tcx_load, s);
     qemu_register_reset(tcx_reset, s);
     tcx_reset(s);
-    dpy_resize(s->ds, width, height);
+    qemu_console_resize(s->ds, width, height);
 }
 
 static void tcx_screen_dump(void *opaque, const char *filename)