*/
#include "qemu/osdep.h"
+#include "qemu/log.h"
#include "hw/sysbus.h"
+#include "migration/vmstate.h"
#include "qemu/timer.h"
-#include "qemu/main-loop.h"
-#include "qemu-common.h"
+#include "qemu/module.h"
#include "hw/ptimer.h"
#include "hw/arm/exynos4210.h"
+#include "hw/irq.h"
+#include "qom/object.h"
//#define DEBUG_MCT
L_REG_CNT_AMOUNT
};
-#define MCT_NIRQ 6
#define MCT_SFR_SIZE 0x444
#define MCT_GT_CMP_NUM 4
-#define MCT_GT_MAX_VAL UINT64_MAX
-
#define MCT_GT_COUNTER_STEP 0x100000000ULL
#define MCT_LT_COUNTER_STEP 0x100000000ULL
#define MCT_LT_CNT_LOW_LIMIT 0x100
} Exynos4210MCTLT;
#define TYPE_EXYNOS4210_MCT "exynos4210.mct"
-#define EXYNOS4210_MCT(obj) \
- OBJECT_CHECK(Exynos4210MCTState, (obj), TYPE_EXYNOS4210_MCT)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210MCTState, EXYNOS4210_MCT)
-typedef struct Exynos4210MCTState {
+struct Exynos4210MCTState {
SysBusDevice parent_obj;
MemoryRegion iomem;
Exynos4210MCTGT g_timer;
uint32_t freq; /* all timers tick frequency, TCLK */
-} Exynos4210MCTState;
+};
/*** VMState ***/
static const VMStateDescription vmstate_tick_timer = {
/*
* Set counter of FRC global timer.
+ * Must be called within exynos4210_gfrc_tx_begin/commit block.
*/
static void exynos4210_gfrc_set_count(Exynos4210MCTGT *s, uint64_t count)
{
/*
* Stop global FRC timer
+ * Must be called within exynos4210_gfrc_tx_begin/commit block.
*/
static void exynos4210_gfrc_stop(Exynos4210MCTGT *s)
{
/*
* Start global FRC timer
+ * Must be called within exynos4210_gfrc_tx_begin/commit block.
*/
static void exynos4210_gfrc_start(Exynos4210MCTGT *s)
{
ptimer_run(s->ptimer_frc, 1);
}
+/*
+ * Start ptimer transaction for global FRC timer; this is just for
+ * consistency with the way we wrap operations like stop and run.
+ */
+static void exynos4210_gfrc_tx_begin(Exynos4210MCTGT *s)
+{
+ ptimer_transaction_begin(s->ptimer_frc);
+}
+
+/* Commit ptimer transaction for global FRC timer. */
+static void exynos4210_gfrc_tx_commit(Exynos4210MCTGT *s)
+{
+ ptimer_transaction_commit(s->ptimer_frc);
+}
+
/*
* Find next nearest Comparator. If current Comparator value equals to other
* Comparator value, skip them both
/*
* Restart global FRC timer
+ * Must be called within exynos4210_gfrc_tx_begin/commit block.
*/
static void exynos4210_gfrc_restart(Exynos4210MCTState *s)
{
/*
* Set counter of FRC local timer.
+ * Must be called from within exynos4210_lfrc_tx_begin/commit block.
*/
static void exynos4210_lfrc_update_count(Exynos4210MCTLT *s)
{
/*
* Start local FRC timer
+ * Must be called from within exynos4210_lfrc_tx_begin/commit block.
*/
static void exynos4210_lfrc_start(Exynos4210MCTLT *s)
{
/*
* Stop local FRC timer
+ * Must be called from within exynos4210_lfrc_tx_begin/commit block.
*/
static void exynos4210_lfrc_stop(Exynos4210MCTLT *s)
{
ptimer_stop(s->ptimer_frc);
}
+/* Start ptimer transaction for local FRC timer */
+static void exynos4210_lfrc_tx_begin(Exynos4210MCTLT *s)
+{
+ ptimer_transaction_begin(s->ptimer_frc);
+}
+
+/* Commit ptimer transaction for local FRC timer */
+static void exynos4210_lfrc_tx_commit(Exynos4210MCTLT *s)
+{
+ ptimer_transaction_commit(s->ptimer_frc);
+}
+
/*
* Local timer free running counter tick handler
*/
/*
* Start local tick cnt timer.
+ * Must be called within exynos4210_ltick_tx_begin/commit block.
*/
static void exynos4210_ltick_cnt_start(struct tick_timer *s)
{
/*
* Stop local tick cnt timer.
+ * Must be called within exynos4210_ltick_tx_begin/commit block.
*/
static void exynos4210_ltick_cnt_stop(struct tick_timer *s)
{
}
}
+/* Start ptimer transaction for local tick timer */
+static void exynos4210_ltick_tx_begin(struct tick_timer *s)
+{
+ ptimer_transaction_begin(s->ptimer_tick);
+}
+
+/* Commit ptimer transaction for local tick timer */
+static void exynos4210_ltick_tx_commit(struct tick_timer *s)
+{
+ ptimer_transaction_commit(s->ptimer_tick);
+}
+
/*
* Get counter for CNT timer
*/
/*
* Set new values of counters for CNT and INT timers
+ * Must be called within exynos4210_ltick_tx_begin/commit block.
*/
static void exynos4210_ltick_set_cntb(struct tick_timer *s, uint32_t new_cnt,
uint32_t new_int)
static void exynos4210_ltick_timer_init(struct tick_timer *s)
{
exynos4210_ltick_int_stop(s);
+ exynos4210_ltick_tx_begin(s);
exynos4210_ltick_cnt_stop(s);
+ exynos4210_ltick_tx_commit(s);
s->count = 0;
s->distance = 0;
exynos4210_ltick_int_start(&s->tick_timer);
}
+static void tx_ptimer_set_freq(ptimer_state *s, uint32_t freq)
+{
+ /*
+ * callers of exynos4210_mct_update_freq() never do anything
+ * else that needs to be in the same ptimer transaction, so
+ * to avoid a lot of repetition we have a convenience function
+ * for begin/set_freq/commit.
+ */
+ ptimer_transaction_begin(s);
+ ptimer_set_freq(s, freq);
+ ptimer_transaction_commit(s);
+}
+
/* update timer frequency */
static void exynos4210_mct_update_freq(Exynos4210MCTState *s)
{
uint32_t freq = s->freq;
s->freq = 24000000 /
- ((MCT_CFG_GET_PRESCALER(s->reg_mct_cfg)+1) *
+ ((MCT_CFG_GET_PRESCALER(s->reg_mct_cfg) + 1) *
MCT_CFG_GET_DIVIDER(s->reg_mct_cfg));
if (freq != s->freq) {
DPRINTF("freq=%dHz\n", s->freq);
/* global timer */
- ptimer_set_freq(s->g_timer.ptimer_frc, s->freq);
+ tx_ptimer_set_freq(s->g_timer.ptimer_frc, s->freq);
/* local timer */
- ptimer_set_freq(s->l_timer[0].tick_timer.ptimer_tick, s->freq);
- ptimer_set_freq(s->l_timer[0].ptimer_frc, s->freq);
- ptimer_set_freq(s->l_timer[1].tick_timer.ptimer_tick, s->freq);
- ptimer_set_freq(s->l_timer[1].ptimer_frc, s->freq);
+ tx_ptimer_set_freq(s->l_timer[0].tick_timer.ptimer_tick, s->freq);
+ tx_ptimer_set_freq(s->l_timer[0].ptimer_frc, s->freq);
+ tx_ptimer_set_freq(s->l_timer[1].tick_timer.ptimer_tick, s->freq);
+ tx_ptimer_set_freq(s->l_timer[1].ptimer_frc, s->freq);
}
}
/* global timer */
memset(&s->g_timer.reg, 0, sizeof(s->g_timer.reg));
+ exynos4210_gfrc_tx_begin(&s->g_timer);
exynos4210_gfrc_stop(&s->g_timer);
+ exynos4210_gfrc_tx_commit(&s->g_timer);
/* local timer */
memset(s->l_timer[0].reg.cnt, 0, sizeof(s->l_timer[0].reg.cnt));
s->l_timer[i].tick_timer.count = 0;
s->l_timer[i].tick_timer.distance = 0;
s->l_timer[i].tick_timer.progress = 0;
+ exynos4210_lfrc_tx_begin(&s->l_timer[i]);
ptimer_stop(s->l_timer[i].ptimer_frc);
+ exynos4210_lfrc_tx_commit(&s->l_timer[i]);
exynos4210_ltick_timer_init(&s->l_timer[i].tick_timer);
}
int index;
int shift;
uint64_t count;
- uint32_t value;
+ uint32_t value = 0;
int lt_i;
switch (offset) {
case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3):
case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3):
- index = GET_G_COMP_IDX(offset);
- shift = 8 * (offset & 0x4);
- value = UINT32_MAX & (s->g_timer.reg.comp[index] >> shift);
+ index = GET_G_COMP_IDX(offset);
+ shift = 8 * (offset & 0x4);
+ value = UINT32_MAX & (s->g_timer.reg.comp[index] >> shift);
break;
case G_TCON:
lt_i = GET_L_TIMER_IDX(offset);
value = exynos4210_lfrc_get_count(&s->l_timer[lt_i]);
-
break;
case L0_TCON: case L1_TCON:
break;
default:
- hw_error("exynos4210.mct: bad read offset "
- TARGET_FMT_plx "\n", offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
break;
}
return value;
}
s->g_timer.reg.cnt = new_frc;
+ exynos4210_gfrc_tx_begin(&s->g_timer);
exynos4210_gfrc_restart(s);
+ exynos4210_gfrc_tx_commit(&s->g_timer);
break;
case G_CNT_WSTAT:
case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3):
case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3):
- index = GET_G_COMP_IDX(offset);
- shift = 8 * (offset & 0x4);
- s->g_timer.reg.comp[index] =
- (s->g_timer.reg.comp[index] &
- (((uint64_t)UINT32_MAX << 32) >> shift)) +
- (value << shift);
+ index = GET_G_COMP_IDX(offset);
+ shift = 8 * (offset & 0x4);
+ s->g_timer.reg.comp[index] =
+ (s->g_timer.reg.comp[index] &
+ (((uint64_t)UINT32_MAX << 32) >> shift)) +
+ (value << shift);
- DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift);
+ DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift);
- if (offset&0x4) {
- s->g_timer.reg.wstat |= G_WSTAT_COMP_U(index);
- } else {
- s->g_timer.reg.wstat |= G_WSTAT_COMP_L(index);
- }
+ if (offset & 0x4) {
+ s->g_timer.reg.wstat |= G_WSTAT_COMP_U(index);
+ } else {
+ s->g_timer.reg.wstat |= G_WSTAT_COMP_L(index);
+ }
- exynos4210_gfrc_restart(s);
- break;
+ exynos4210_gfrc_tx_begin(&s->g_timer);
+ exynos4210_gfrc_restart(s);
+ exynos4210_gfrc_tx_commit(&s->g_timer);
+ break;
case G_TCON:
old_val = s->g_timer.reg.tcon;
DPRINTF("global timer write to reg.g_tcon %llx\n", value);
+ exynos4210_gfrc_tx_begin(&s->g_timer);
+
/* Start FRC if transition from disabled to enabled */
if ((value & G_TCON_TIMER_ENABLE) > (old_val &
G_TCON_TIMER_ENABLE)) {
- exynos4210_gfrc_start(&s->g_timer);
+ exynos4210_gfrc_restart(s);
}
if ((value & G_TCON_TIMER_ENABLE) < (old_val &
G_TCON_TIMER_ENABLE)) {
exynos4210_gfrc_restart(s);
}
}
+
+ exynos4210_gfrc_tx_commit(&s->g_timer);
break;
case G_INT_CSTAT:
break;
case G_INT_ENB:
-
/* Raise IRQ if transition from disabled to enabled and CSTAT pending */
for (i = 0; i < MCT_GT_CMP_NUM; i++) {
if ((value & G_INT_ENABLE(i)) > (s->g_timer.reg.tcon &
s->l_timer[lt_i].reg.wstat |= L_WSTAT_TCON_WRITE;
s->l_timer[lt_i].reg.tcon = value;
+ exynos4210_ltick_tx_begin(&s->l_timer[lt_i].tick_timer);
/* Stop local CNT */
if ((value & L_TCON_TICK_START) <
(old_val & L_TCON_TICK_START)) {
DPRINTF("local timer[%d] start int\n", lt_i);
exynos4210_ltick_int_start(&s->l_timer[lt_i].tick_timer);
}
+ exynos4210_ltick_tx_commit(&s->l_timer[lt_i].tick_timer);
/* Start or Stop local FRC if TCON changed */
+ exynos4210_lfrc_tx_begin(&s->l_timer[lt_i]);
if ((value & L_TCON_FRC_START) >
(s->l_timer[lt_i].reg.tcon & L_TCON_FRC_START)) {
DPRINTF("local timer[%d] start frc\n", lt_i);
DPRINTF("local timer[%d] stop frc\n", lt_i);
exynos4210_lfrc_stop(&s->l_timer[lt_i]);
}
+ exynos4210_lfrc_tx_commit(&s->l_timer[lt_i]);
break;
case L0_TCNTB: case L1_TCNTB:
-
lt_i = GET_L_TIMER_IDX(offset);
- index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
/*
* TCNTB is updated to internal register only after CNT expired.
* Due to this we should reload timer to nearest moment when CNT is
* expired and then in event handler update tcntb to new TCNTB value.
*/
+ exynos4210_ltick_tx_begin(&s->l_timer[lt_i].tick_timer);
exynos4210_ltick_set_cntb(&s->l_timer[lt_i].tick_timer, value,
s->l_timer[lt_i].tick_timer.icntb);
+ exynos4210_ltick_tx_commit(&s->l_timer[lt_i].tick_timer);
s->l_timer[lt_i].reg.wstat |= L_WSTAT_TCNTB_WRITE;
s->l_timer[lt_i].reg.cnt[L_REG_CNT_TCNTB] = value;
break;
case L0_ICNTB: case L1_ICNTB:
-
lt_i = GET_L_TIMER_IDX(offset);
- index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
s->l_timer[lt_i].reg.wstat |= L_WSTAT_ICNTB_WRITE;
s->l_timer[lt_i].reg.cnt[L_REG_CNT_ICNTB] = value &
if (icntb_max[lt_i] < value) {
icntb_max[lt_i] = value;
}
-DPRINTF("local timer[%d] ICNTB write %llx; max=%x, min=%x\n\n",
- lt_i, value, icntb_max[lt_i], icntb_min[lt_i]);
+ DPRINTF("local timer[%d] ICNTB write %llx; max=%x, min=%x\n\n",
+ lt_i, value, icntb_max[lt_i], icntb_min[lt_i]);
#endif
-break;
+ break;
case L0_FRCNTB: case L1_FRCNTB:
-
lt_i = GET_L_TIMER_IDX(offset);
- index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);
-
DPRINTF("local timer[%d] FRCNTB write %llx\n", lt_i, value);
s->l_timer[lt_i].reg.wstat |= L_WSTAT_FRCCNTB_WRITE;
case L0_TCNTO: case L1_TCNTO:
case L0_ICNTO: case L1_ICNTO:
case L0_FRCNTO: case L1_FRCNTO:
- fprintf(stderr, "\n[exynos4210.mct: write to RO register "
- TARGET_FMT_plx "]\n\n", offset);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "exynos4210.mct: write to RO register " TARGET_FMT_plx,
+ offset);
break;
case L0_INT_CSTAT: case L1_INT_CSTAT:
break;
default:
- hw_error("exynos4210.mct: bad write offset "
- TARGET_FMT_plx "\n", offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
break;
}
}
int i;
Exynos4210MCTState *s = EXYNOS4210_MCT(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
- QEMUBH *bh[2];
/* Global timer */
- bh[0] = qemu_bh_new(exynos4210_gfrc_event, s);
- s->g_timer.ptimer_frc = ptimer_init(bh[0], PTIMER_POLICY_DEFAULT);
+ s->g_timer.ptimer_frc = ptimer_init(exynos4210_gfrc_event, s,
+ PTIMER_POLICY_DEFAULT);
memset(&s->g_timer.reg, 0, sizeof(struct gregs));
/* Local timers */
for (i = 0; i < 2; i++) {
- bh[0] = qemu_bh_new(exynos4210_ltick_event, &s->l_timer[i]);
- bh[1] = qemu_bh_new(exynos4210_lfrc_event, &s->l_timer[i]);
s->l_timer[i].tick_timer.ptimer_tick =
- ptimer_init(bh[0], PTIMER_POLICY_DEFAULT);
- s->l_timer[i].ptimer_frc = ptimer_init(bh[1], PTIMER_POLICY_DEFAULT);
+ ptimer_init(exynos4210_ltick_event, &s->l_timer[i],
+ PTIMER_POLICY_DEFAULT);
+ s->l_timer[i].ptimer_frc =
+ ptimer_init(exynos4210_lfrc_event, &s->l_timer[i],
+ PTIMER_POLICY_DEFAULT);
s->l_timer[i].id = i;
}
projects / mirror_qemu.git / blobdiff