* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
- * USA.
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
*
* By Richard W.M. Jones (rjones@redhat.com).
*/
#include "qemu-timer.h"
#include "watchdog.h"
#include "hw.h"
-#include "isa.h"
-#include "pc.h"
#include "pci.h"
/*#define I6300ESB_DEBUG 1*/
#define i6300esb_debug(fs,...)
#endif
-#ifndef PCI_DEVICE_ID_INTEL_ESB_9
-#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab
-#endif
-
/* PCI configuration registers */
#define ESB_CONFIG_REG 0x60 /* Config register */
#define ESB_LOCK_REG 0x68 /* WDT lock register */
/* Device state. */
struct I6300State {
- PCIDevice dev; /* PCI device state, must be first field. */
+ PCIDevice dev;
int reboot_enabled; /* "Reboot" on timer expiry. The real action
* performed depends on the -watchdog-action
timeout <<= 5;
/* Get the timeout in units of ticks_per_sec. */
- timeout = ticks_per_sec * timeout / 33000000;
+ timeout = get_ticks_per_sec() * timeout / 33000000;
i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
- qemu_mod_timer(d->timer, qemu_get_clock(vm_clock) + timeout);
+ qemu_mod_timer(d->timer, qemu_get_clock_ns(vm_clock) + timeout);
}
/* This is called when the guest disables the watchdog. */
qemu_del_timer(d->timer);
}
-static void i6300esb_reset(I6300State *d)
+static void i6300esb_reset(DeviceState *dev)
{
- /* XXX We should probably reset other parts of the state here,
- * but we should also reset our state on general machine reset
- * too. For now just disable the timer so it doesn't fire
- * again after the reboot.
- */
+ PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
+ I6300State *d = DO_UPCAST(I6300State, dev, pdev);
+
+ i6300esb_debug("I6300State = %p\n", d);
+
i6300esb_disable_timer(d);
+
+ /* NB: Don't change d->previous_reboot_flag in this function. */
+
+ d->reboot_enabled = 1;
+ d->clock_scale = CLOCK_SCALE_1KHZ;
+ d->int_type = INT_TYPE_IRQ;
+ d->free_run = 0;
+ d->locked = 0;
+ d->enabled = 0;
+ d->timer1_preload = 0xfffff;
+ d->timer2_preload = 0xfffff;
+ d->stage = 1;
+ d->unlock_state = 0;
}
/* This function is called when the watchdog expires. Note that
*/
static void i6300esb_timer_expired(void *vp)
{
- I6300State *d = (I6300State *) vp;
+ I6300State *d = vp;
i6300esb_debug("stage %d\n", d->stage);
if (d->reboot_enabled) {
d->previous_reboot_flag = 1;
watchdog_perform_action(); /* This reboots, exits, etc */
- i6300esb_reset(d);
+ i6300esb_reset(&d->dev.qdev);
}
/* In "free running mode" we start stage 1 again. */
static void i6300esb_config_write(PCIDevice *dev, uint32_t addr,
uint32_t data, int len)
{
- I6300State *d = (I6300State *) dev;
+ I6300State *d = DO_UPCAST(I6300State, dev, dev);
int old;
i6300esb_debug("addr = %x, data = %x, len = %d\n", addr, data, len);
static uint32_t i6300esb_config_read(PCIDevice *dev, uint32_t addr, int len)
{
- I6300State *d = (I6300State *) dev;
+ I6300State *d = DO_UPCAST(I6300State, dev, dev);
uint32_t data;
i6300esb_debug ("addr = %x, len = %d\n", addr, len);
static uint32_t i6300esb_mem_readw(void *vp, target_phys_addr_t addr)
{
uint32_t data = 0;
- I6300State *d = (I6300State *) vp;
+ I6300State *d = vp;
i6300esb_debug("addr = %x\n", (int) addr);
static void i6300esb_mem_writeb(void *vp, target_phys_addr_t addr, uint32_t val)
{
- I6300State *d = (I6300State *) vp;
+ I6300State *d = vp;
i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
static void i6300esb_mem_writew(void *vp, target_phys_addr_t addr, uint32_t val)
{
- I6300State *d = (I6300State *) vp;
+ I6300State *d = vp;
i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
static void i6300esb_mem_writel(void *vp, target_phys_addr_t addr, uint32_t val)
{
- I6300State *d = (I6300State *) vp;
+ I6300State *d = vp;
i6300esb_debug ("addr = %x, val = %x\n", (int) addr, val);
}
}
-static void i6300esb_map(PCIDevice *dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+static const VMStateDescription vmstate_i6300esb = {
+ .name = "i6300esb_wdt",
+ .version_id = sizeof(I6300State),
+ .minimum_version_id = sizeof(I6300State),
+ .minimum_version_id_old = sizeof(I6300State),
+ .fields = (VMStateField []) {
+ VMSTATE_PCI_DEVICE(dev, I6300State),
+ VMSTATE_INT32(reboot_enabled, I6300State),
+ VMSTATE_INT32(clock_scale, I6300State),
+ VMSTATE_INT32(int_type, I6300State),
+ VMSTATE_INT32(free_run, I6300State),
+ VMSTATE_INT32(locked, I6300State),
+ VMSTATE_INT32(enabled, I6300State),
+ VMSTATE_TIMER(timer, I6300State),
+ VMSTATE_UINT32(timer1_preload, I6300State),
+ VMSTATE_UINT32(timer2_preload, I6300State),
+ VMSTATE_INT32(stage, I6300State),
+ VMSTATE_INT32(unlock_state, I6300State),
+ VMSTATE_INT32(previous_reboot_flag, I6300State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static int i6300esb_init(PCIDevice *dev)
{
- static CPUReadMemoryFunc *mem_read[3] = {
+ I6300State *d = DO_UPCAST(I6300State, dev, dev);
+ int io_mem;
+ static CPUReadMemoryFunc * const mem_read[3] = {
i6300esb_mem_readb,
i6300esb_mem_readw,
i6300esb_mem_readl,
};
- static CPUWriteMemoryFunc *mem_write[3] = {
+ static CPUWriteMemoryFunc * const mem_write[3] = {
i6300esb_mem_writeb,
i6300esb_mem_writew,
i6300esb_mem_writel,
};
- I6300State *d = (I6300State *) dev;
- int io_mem;
-
- i6300esb_debug("addr = %x, size = %x, type = %d\n", addr, size, type);
-
- io_mem = cpu_register_io_memory (0, mem_read, mem_write, d);
- cpu_register_physical_memory (addr, 0x10, io_mem);
- /* qemu_register_coalesced_mmio (addr, 0x10); ? */
-}
-
-static void i6300esb_save(QEMUFile *f, void *vp)
-{
- I6300State *d = (I6300State *) vp;
-
- pci_device_save(&d->dev, f);
- qemu_put_be32(f, d->reboot_enabled);
- qemu_put_be32(f, d->clock_scale);
- qemu_put_be32(f, d->int_type);
- qemu_put_be32(f, d->free_run);
- qemu_put_be32(f, d->locked);
- qemu_put_be32(f, d->enabled);
- qemu_put_timer(f, d->timer);
- qemu_put_be32(f, d->timer1_preload);
- qemu_put_be32(f, d->timer2_preload);
- qemu_put_be32(f, d->stage);
- qemu_put_be32(f, d->unlock_state);
- qemu_put_be32(f, d->previous_reboot_flag);
-}
-
-static int i6300esb_load(QEMUFile *f, void *vp, int version)
-{
- I6300State *d = (I6300State *) vp;
-
- if (version != sizeof (I6300State))
- return -EINVAL;
-
- pci_device_load(&d->dev, f);
- d->reboot_enabled = qemu_get_be32(f);
- d->clock_scale = qemu_get_be32(f);
- d->int_type = qemu_get_be32(f);
- d->free_run = qemu_get_be32(f);
- d->locked = qemu_get_be32(f);
- d->enabled = qemu_get_be32(f);
- qemu_get_timer(f, d->timer);
- d->timer1_preload = qemu_get_be32(f);
- d->timer2_preload = qemu_get_be32(f);
- d->stage = qemu_get_be32(f);
- d->unlock_state = qemu_get_be32(f);
- d->previous_reboot_flag = qemu_get_be32(f);
-
- return 0;
-}
-
-/* Create and initialize a virtual Intel 6300ESB during PC creation. */
-static void i6300esb_pc_init(PCIBus *pci_bus)
-{
- I6300State *d;
- uint8_t *pci_conf;
-
- if (!pci_bus) {
- fprintf(stderr, "wdt_i6300esb: no PCI bus in this machine\n");
- return;
- }
- d = (I6300State *)
- pci_register_device (pci_bus, "i6300esb_wdt", sizeof (I6300State),
- -1,
- i6300esb_config_read, i6300esb_config_write);
+ i6300esb_debug("I6300State = %p\n", d);
- d->reboot_enabled = 1;
- d->clock_scale = CLOCK_SCALE_1KHZ;
- d->int_type = INT_TYPE_IRQ;
- d->free_run = 0;
- d->locked = 0;
- d->enabled = 0;
- d->timer = qemu_new_timer(vm_clock, i6300esb_timer_expired, d);
- d->timer1_preload = 0xfffff;
- d->timer2_preload = 0xfffff;
- d->stage = 1;
- d->unlock_state = 0;
+ d->timer = qemu_new_timer_ns(vm_clock, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
- pci_conf = d->dev.config;
- pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
- pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_ESB_9);
- pci_config_set_class(pci_conf, PCI_CLASS_SYSTEM_OTHER);
- pci_conf[0x0e] = 0x00;
-
- pci_register_io_region(&d->dev, 0, 0x10,
- PCI_ADDRESS_SPACE_MEM, i6300esb_map);
+ io_mem = cpu_register_io_memory(mem_read, mem_write, d,
+ DEVICE_NATIVE_ENDIAN);
+ pci_register_bar_simple(&d->dev, 0, 0x10, 0, io_mem);
+ /* qemu_register_coalesced_mmio (addr, 0x10); ? */
- register_savevm("i6300esb_wdt", -1, sizeof(I6300State),
- i6300esb_save, i6300esb_load, d);
+ return 0;
}
static WatchdogTimerModel model = {
.wdt_name = "i6300esb",
.wdt_description = "Intel 6300ESB",
- .wdt_pc_init = i6300esb_pc_init,
};
-void wdt_i6300esb_init(void)
+static PCIDeviceInfo i6300esb_info = {
+ .qdev.name = "i6300esb",
+ .qdev.size = sizeof(I6300State),
+ .qdev.vmsd = &vmstate_i6300esb,
+ .qdev.reset = i6300esb_reset,
+ .config_read = i6300esb_config_read,
+ .config_write = i6300esb_config_write,
+ .init = i6300esb_init,
+ .vendor_id = PCI_VENDOR_ID_INTEL,
+ .device_id = PCI_DEVICE_ID_INTEL_ESB_9,
+ .class_id = PCI_CLASS_SYSTEM_OTHER,
+};
+
+static void i6300esb_register_devices(void)
{
watchdog_add_model(&model);
+ pci_qdev_register(&i6300esb_info);
}
+
+device_init(i6300esb_register_devices);
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