hrtimer: Annotate lockless access to timer->state

[mirror_ubuntu-bionic-kernel.git] / include / drm / i915_pciids.h

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 972a25633525d9599b7c5c35d63e780b8adc701d..10f8540cb76278d0a76889de41d7f3a69ed1268c 100644 (file)
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -364,33 +364,70 @@
 #define INTEL_KBL_GT4_IDS(info) \
        INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
 
+/* AML/KBL Y GT2 */
+#define INTEL_AML_GT2_IDS(info) \
+       INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
+       INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
+
 #define INTEL_KBL_IDS(info) \
        INTEL_KBL_GT1_IDS(info), \
        INTEL_KBL_GT2_IDS(info), \
        INTEL_KBL_GT3_IDS(info), \
-       INTEL_KBL_GT4_IDS(info)
+       INTEL_KBL_GT4_IDS(info), \
+       INTEL_AML_GT2_IDS(info)
 
 /* CFL S */
 #define INTEL_CFL_S_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
-       INTEL_VGA_DEVICE(0x3E93, info)  /* SRV GT1 */
+       INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
+       INTEL_VGA_DEVICE(0x3E99, info)  /* SRV GT1 */
 
 #define INTEL_CFL_S_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
-       INTEL_VGA_DEVICE(0x3E96, info)  /* SRV GT2 */
+       INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
+       INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \
+       INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */
 
 /* CFL H */
 #define INTEL_CFL_H_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
 
-/* CFL U */
+/* CFL U GT2 */
+#define INTEL_CFL_U_GT2_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA9, info)
+
+/* CFL U GT3 */
 #define INTEL_CFL_U_GT3_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
-       INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \
-       INTEL_VGA_DEVICE(0x3EA5, info)  /* ULT GT3 */
+       INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
+
+/* WHL/CFL U GT1 */
+#define INTEL_WHL_U_GT1_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA1, info)
+
+/* WHL/CFL U GT2 */
+#define INTEL_WHL_U_GT2_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA0, info)
+
+/* WHL/CFL U GT3 */
+#define INTEL_WHL_U_GT3_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA2, info), \
+       INTEL_VGA_DEVICE(0x3EA3, info), \
+       INTEL_VGA_DEVICE(0x3EA4, info)
+
+#define INTEL_CFL_IDS(info)       \
+       INTEL_CFL_S_GT1_IDS(info), \
+       INTEL_CFL_S_GT2_IDS(info), \
+       INTEL_CFL_H_GT2_IDS(info), \
+       INTEL_CFL_U_GT2_IDS(info), \
+       INTEL_CFL_U_GT3_IDS(info), \
+       INTEL_WHL_U_GT1_IDS(info), \
+       INTEL_WHL_U_GT2_IDS(info), \
+       INTEL_WHL_U_GT3_IDS(info)
 
 /* CNL U 2+2 */
 #define INTEL_CNL_U_GT2_IDS(info) \