]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blobdiff - include/linux/mlx5/driver.h
Merge https://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[mirror_ubuntu-artful-kernel.git] / include / linux / mlx5 / driver.h
index ba260330ce5e6c921e28c41d6789a4ae69c249d3..df6ce59a1f954257cdef95a7733736e42c8b9491 100644 (file)
@@ -44,6 +44,7 @@
 #include <linux/workqueue.h>
 #include <linux/mempool.h>
 #include <linux/interrupt.h>
+#include <linux/idr.h>
 
 #include <linux/mlx5/device.h>
 #include <linux/mlx5/doorbell.h>
@@ -108,6 +109,9 @@ enum {
        MLX5_REG_QTCT            = 0x400a,
        MLX5_REG_DCBX_PARAM      = 0x4020,
        MLX5_REG_DCBX_APP        = 0x4021,
+       MLX5_REG_FPGA_CAP        = 0x4022,
+       MLX5_REG_FPGA_CTRL       = 0x4023,
+       MLX5_REG_FPGA_ACCESS_REG = 0x4024,
        MLX5_REG_PCAP            = 0x5001,
        MLX5_REG_PMTU            = 0x5003,
        MLX5_REG_PTYS            = 0x5004,
@@ -129,6 +133,9 @@ enum {
        MLX5_REG_MPCNT           = 0x9051,
        MLX5_REG_MTPPS           = 0x9053,
        MLX5_REG_MTPPSE          = 0x9054,
+       MLX5_REG_MCQI            = 0x9061,
+       MLX5_REG_MCC             = 0x9062,
+       MLX5_REG_MCDA            = 0x9063,
        MLX5_REG_MCAM            = 0x907f,
 };
 
@@ -732,6 +739,14 @@ struct mlx5e_resources {
        struct mlx5_sq_bfreg       bfreg;
 };
 
+#define MLX5_MAX_RESERVED_GIDS 8
+
+struct mlx5_rsvd_gids {
+       unsigned int start;
+       unsigned int count;
+       struct ida ida;
+};
+
 struct mlx5_core_dev {
        struct pci_dev         *pdev;
        /* sync pci state */
@@ -761,6 +776,13 @@ struct mlx5_core_dev {
        atomic_t                num_qps;
        u32                     issi;
        struct mlx5e_resources  mlx5e_res;
+       struct {
+               struct mlx5_rsvd_gids   reserved_gids;
+               atomic_t                roce_en;
+       } roce;
+#ifdef CONFIG_MLX5_FPGA
+       struct mlx5_fpga_device *fpga;
+#endif
 #ifdef CONFIG_RFS_ACCEL
        struct cpu_rmap         *rmap;
 #endif
@@ -812,6 +834,7 @@ struct mlx5_cmd_work_ent {
        u64                     ts1;
        u64                     ts2;
        u16                     op;
+       bool                    polling;
 };
 
 struct mlx5_pas {
@@ -895,11 +918,6 @@ static inline u16 cmdif_rev(struct mlx5_core_dev *dev)
        return ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
 }
 
-static inline void *mlx5_vzalloc(unsigned long size)
-{
-       return kvzalloc(size, GFP_KERNEL);
-}
-
 static inline u32 mlx5_base_mkey(const u32 key)
 {
        return key & 0xffffff00u;
@@ -915,6 +933,8 @@ int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
 int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size,
                     void *out, int out_size, mlx5_cmd_cbk_t callback,
                     void *context);
+int mlx5_cmd_exec_polling(struct mlx5_core_dev *dev, void *in, int in_size,
+                         void *out, int out_size);
 void mlx5_cmd_mbox_status(void *out, u8 *status, u32 *syndrome);
 
 int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type);
@@ -925,6 +945,7 @@ int mlx5_health_init(struct mlx5_core_dev *dev);
 void mlx5_start_health_poll(struct mlx5_core_dev *dev);
 void mlx5_stop_health_poll(struct mlx5_core_dev *dev);
 void mlx5_drain_health_wq(struct mlx5_core_dev *dev);
+void mlx5_trigger_health_work(struct mlx5_core_dev *dev);
 void mlx5_drain_health_recovery(struct mlx5_core_dev *dev);
 int mlx5_buf_alloc_node(struct mlx5_core_dev *dev, int size,
                        struct mlx5_buf *buf, int node);
@@ -1039,6 +1060,11 @@ int mlx5_alloc_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg,
                     bool map_wc, bool fast_path);
 void mlx5_free_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg);
 
+unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev);
+int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
+                          u8 roce_version, u8 roce_l3_type, const u8 *gid,
+                          const u8 *mac, bool vlan, u16 vlan_id);
+
 static inline int fw_initializing(struct mlx5_core_dev *dev)
 {
        return ioread32be(&dev->iseg->initializing) >> 31;