perf: Fix up delayed_put_task_struct()

[mirror_ubuntu-bionic-kernel.git] / include / linux / serial_reg.h

diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h
index cf9327c051adb9b3b7d78113f916fbc261c99a64..c7a0ce11cd47b15b7187572db9285abd9c2cd469 100644 (file)
--- a/include/linux/serial_reg.h
+++ b/include/linux/serial_reg.h
@@ -221,8 +221,24 @@
 #define UART_FCR_PXAR16        0x80    /* receive FIFO threshold = 16 */
 #define UART_FCR_PXAR32        0xc0    /* receive FIFO threshold = 32 */
 
+/*
+ * Intel MID on-chip HSU (High Speed UART) defined bits
+ */
+#define UART_FCR_HSU_64_1B     0x00    /* receive FIFO treshold = 1 */
+#define UART_FCR_HSU_64_16B    0x40    /* receive FIFO treshold = 16 */
+#define UART_FCR_HSU_64_32B    0x80    /* receive FIFO treshold = 32 */
+#define UART_FCR_HSU_64_56B    0xc0    /* receive FIFO treshold = 56 */
+
+#define UART_FCR_HSU_16_1B     0x00    /* receive FIFO treshold = 1 */
+#define UART_FCR_HSU_16_4B     0x40    /* receive FIFO treshold = 4 */
+#define UART_FCR_HSU_16_8B     0x80    /* receive FIFO treshold = 8 */
+#define UART_FCR_HSU_16_14B    0xc0    /* receive FIFO treshold = 14 */
 
+#define UART_FCR_HSU_64B_FIFO  0x20    /* chose 64 bytes FIFO */
+#define UART_FCR_HSU_16B_FIFO  0x00    /* chose 16 bytes FIFO */
 
+#define UART_FCR_HALF_EMPT_TXI 0x00    /* trigger TX_EMPT IRQ for half empty */
+#define UART_FCR_FULL_EMPT_TXI 0x08    /* trigger TX_EMPT IRQ for full empty */
 
 /*
  * These register definitions are for the 16C950