target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows

[mirror_qemu.git] / linux-user / arm / cpu_loop.c

diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index e4bca93749be9bd854bf8f55e24224af9a36759e..c0790f3246b91be85b33a036b5d1d054e5302e41 100644 (file)
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -18,7 +18,6 @@
  */
 
 #include "qemu/osdep.h"
-#include "qemu-common.h"
 #include "qemu.h"
 #include "user-internals.h"
 #include "elf.h"
@@ -231,7 +230,7 @@ do_kernel_trap(CPUARMState *env)
     /* Jump back to the caller.  */
     addr = env->regs[14];
     if (addr & 1) {
-        env->thumb = 1;
+        env->thumb = true;
         addr &= ~1;
     }
     env->regs[15] = addr;
@@ -450,7 +449,7 @@ void cpu_loop(CPUARMState *env)
             }
             break;
         case EXCP_SEMIHOST:
-            env->regs[0] = do_common_semihosting(cs);
+            do_common_semihosting(cs);
             env->regs[15] += env->thumb ? 2 : 4;
             break;
         case EXCP_INTERRUPT: